Method of Connecting a Semiconductor Package to a Board

• US 20150243593A1
• Filed: 02/27/2014
• Published: 08/27/2015
• Est. Priority Date: 02/27/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Marbella, Carlo
• Granted Patent: US 9,343,397 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/10126 Bump collar
• CPC Class Codes: H01L 2224/13014 being circular or elliptic
• CPC Class Codes: H01L 2224/13016 in side view
• CPC Class Codes: H01L 2224/13105 Gallium [Ga] as principal constituent
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13116 Lead [Pb] as principal constituent
• CPC Class Codes: H01L 2224/13118 Zinc [Zn] as principal constituent
• CPC Class Codes: H01L 2224/1312 Antimony [Sb] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13157 Cobalt [Co] as principal constituent
• CPC Class Codes: H01L 2224/1316 Iron [Fe] as principal constituent
• CPC Class Codes: H01L 2224/13171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/14131 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 2224/14135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/14136 Covering only the central area of the surface to be connected, i.e. central arrangements
• CPC Class Codes: H01L 2224/14179 Corner adaptations, i.e. disposition of the bump connectors at the corners of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/14517 including bump connectors providing primarily mechanical bonding
• CPC Class Codes: H01L 2224/16106 : the bump connector connecting one bonding area to at least two respective bonding areas
• CPC Class Codes: H01L 2224/1705 : Shape
• CPC Class Codes: H01L 2224/17051 : Bump connectors having different shapes
• CPC Class Codes: H01L 2224/17106 : the bump connectors being bonded to at least one common bonding area
• CPC Class Codes: H01L 2224/81815 : Reflow soldering
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/17 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/01008 : Oxygen [O]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/20107 : Temperature range 250 C=<T<300 C, 523.15K =<T< 573.15K
• CPC Class Codes: H01L 2924/20108 : Temperature range 300 C=<T<350 C, 573.15K =<T< 623.15K
• CPC Class Codes: H05K 1/111 : Pads for surface mounting, e.g. lay-out
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of connecting a semiconductor package to a board includes providing a board having a plurality of contact regions, providing a semiconductor package having a plurality of contact areas, selecting a specific contact area out of the plurality of contact areas, applying solder balls to the contact areas and therein applying two or more specific solder balls to the specific contact area, and connecting the semiconductor package to the board in such a way that the two or more specific solder balls are connected with each other and with a contact region of the plurality of contact regions of the board.

Claims

1. A method of connecting a semiconductor package to a board, the method comprising:

providing a board, the board comprising a plurality of contact regions;

providing a semiconductor package, the semiconductor package comprising a plurality of contact areas;

selecting a specific contact area out of the plurality of contact areas;

applying solder balls to the contact areas and therein applying two or more specific solder balls to the specific contact area; and

connecting the semiconductor package to the board in such away that the two or more specific solder balls are connected with each other and with a contact region of the plurality of contact regions of the board.

2. The method according to claim 1, further comprising:

selecting two or more specific contact areas out of the plurality of contact areas.

3. The method according to claim 2, wherein the semiconductor package comprises a rectangular or quadratic main face, the method further comprising:

selecting four specific contact areas, wherein

each one of the four specific contact areas is located adjacent to one of the four corners of the main face or adjacent to one of the centers of the four side edges of the main face.

4. The method according to claim 1, wherein a minimum distance between the two or more specific solder balls is less than a minimum distance between all other solder balls.

5. The method according to claim 1, wherein the semiconductor package comprises a main face and the contact areas are disposed at the main face, the method further comprising:

applying a solder resist layer to the main face, wherein openings are formed in the solder resist layer above the contact areas wherein a number of openings is formed in the solder resist layer above the specific contact area, the number of openings corresponding to the number of specific solder balls to be applied thereafter.

6. The method according to claim 1, further comprising:

applying a solder paste to the contact regions of the board.

7. The method according to claim 1, wherein connecting the semiconductor package to the board comprises:

contacting the two or more specific solder balls with the contact region or a solder paste applied onto the contact region; and

heating to a reflow temperature.

8. The method according to claim 7, further comprising:

heating to a reflow temperature in a range from room temperature to 300°

C.

9. The method according to claim 7, further comprising:

applying uncured polymer material to the solder balls before heating.

10. A semiconductor package, comprising:

a plurality of contact areas comprising a specific contact area;

a plurality of solder balls applied to the contact areas wherein two or more specific solder balls are applied to the specific contact area and wherein a minimum distance between the two specific solder balls is set such that the two or more specific solder balls merge into one another when connecting them to a substrate in a reflow process.

11. The semiconductor package according to claim 10, further comprising:

two or more specific contact areas; and

two or more specific solder balls applied to each one of the specific contact areas.

12. The semiconductor package according to claim 11, wherein the semiconductor package comprises a rectangular or quadratic main face, the semiconductor package further comprising:

four specific contact areas, wherein each one of the four specific contact areas is located adjacent to one of the four corners of the main face or adjacent to one of the centers of the four side edges of the main face.

13. The semiconductor package according to claim 10, wherein

the two or more specific solder balls have no electrical functionality.

14. The semiconductor package according to claim 10, wherein

the two or more specific solder balls are applied to dummy pads within the specific contact area.

15. The semiconductor package according to claim 10, further comprising:

a solder resist layer comprising a plurality of openings disposed above the specific contact area, wherein the number of openings corresponds to the number of specific solder balls and the specific solder balls are arranged in the openings.

16. A semiconductor package, comprising:

a semiconductor chip;

a main face; and

a plurality of solder balls arranged on the main face, the plurality of solder balls comprising a group of specific solder balls, the group of specific solder balls being electrically disconnected from the semiconductor chip.

17. The semiconductor package according to claim 16, wherein

the group of specific solder balls consists of two, three or four specific solder balls.

18. The semiconductor package according to claim 16, wherein

the specific solder balls of the group of specific solder balls are arranged in a regular manner.

19. The semiconductor package according to claim 16, wherein

the minimum distance between two of the specific solder balls lies in a range from 0.2 mm to 1.5 mm.

20. The semiconductor package according to claim 16, further comprising:

an uncured polymer material applied to the group of specific solder balls.