COMBINED SUBSTRATE

• US 20150255433A1
• Filed: 03/04/2015
• Published: 09/10/2015
• Est. Priority Date: 03/07/2014
• Status: Active Grant

• Current Assignee: Ibiden Co., Ltd.
• Original Assignee: Ibiden Co., Ltd.
• Inventors: Adachi, Takema, Furusawa, Takeshi, Hirabayashi, Tomoyoshi, DAIZO, Tomoya, Nakamura, Wataru, Ito, Yuki, Yoshikawa, Yuki
• Granted Patent: US 9,401,320 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/81191 wherein the bump connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81815 Reflow soldering
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/107 Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB printed circuits H05K1/00
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.

Claims

1. A combined substrate, comprising:

a first substrate having a plurality of first metal posts;

a second substrate having a plurality of second metal posts such that the plurality of second metal posts is positioned to oppose the plurality of first metal posts, respectively; and

a plurality of solder structures interposed between the plurality of first metal posts and the plurality of second metal posts, respectively,

wherein at least one of the plurality of first metal posts and the plurality of second metal posts has a plurality of recessed surfaces configured such that the plurality of solder structures is formed on the plurality of recessed surfaces, respectively.

2. A combined substrate according to claim 1, wherein the plurality of first metal posts and the plurality of second metal posts have the plurality of recessed surfaces.

3. A combined substrate according to claim 1, wherein each of the first metal posts and the second metal posts comprises a metal post comprising copper plating material.

4. A combined substrate according to claim 1, wherein each of the first metal posts has a diameter which is greater than a diameter of each of the second metal posts.

5. A combined substrate according to claim 1, wherein each of the first metal posts has an axial length which is different from an axial length of each of the second metal posts.

6. A combined substrate according to claim 1, wherein one of the plurality of first metal posts and the plurality of second posts is a plurality metal posts which is formed thinner and longer than the other one of the plurality of first metal posts and the plurality of second posts.

7. A combined substrate according to claim 1, wherein each of the first metal posts has an axial length which is greater than an axial length of each of the second metal posts.

8. A combined substrate according to claim 2, wherein each of the first metal posts and the second metal posts comprises a metal post comprising copper plating material.

9. A combined substrate according to claim 2, wherein each of the first metal posts has a diameter which is greater than a diameter of each of the second metal posts.

10. A combined substrate according to claim 2, wherein each of the first metal posts has an axial length which is different from an axial length of each of the second metal posts.

11. A combined substrate according to claim 2, wherein one of the plurality of first metal posts and the plurality of second posts is a plurality metal posts which is formed thinner and longer than the other one of the plurality of first metal posts and the plurality of second posts.

12. A combined substrate according to claim 2, wherein each of the first metal posts has an axial length which is greater than an axial length of each of the second metal posts.

13. A combined substrate according to claim 3, each of the first metal posts has a diameter which is greater than a diameter of each of the second metal posts.

14. A combined substrate according to claim 3, wherein each of the first metal posts has an axial length which is different from an axial length of each of the second metal posts.

15. A combined substrate according to claim 3, wherein one of the plurality of first metal posts and the plurality of second posts is a plurality metal posts which is formed thinner and longer than the other one of the plurality of first metal posts and the plurality of second posts.

16. A combined substrate according to claim 3, wherein each of the first metal posts has an axial length which is greater than an axial length of each of the second metal posts.

17. A combined substrate according to claim 4, wherein each of the first metal posts has an axial length which is different from an axial length of each of the second metal posts.

18. A combined substrate according to claim 4, wherein one of the plurality of first metal posts and the plurality of second posts is a plurality metal posts which is formed thinner and longer than the other one of the plurality of first metal posts and the plurality of second posts.

19. A combined substrate according to claim 4, wherein each of the first metal posts has an axial length which is greater than an axial length of each of the second metal posts.

20. A combined substrate according to claim 1, wherein the first substrate has a plurality of pads positioned to mount a CPU device such that the CPU device is positioned in a space formed between the first substrate and the second substrate.