Methods of Forming Semiconductor Devices and FinFET Devices, and FinFET Devices

• US 20150255545A1
• Filed: 03/10/2014
• Published: 09/10/2015
• Est. Priority Date: 03/10/2014
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Holland, Martin Christopher, Passlack, Matthias, Oxland, Richard Kenneth
• Granted Patent: US 9,355,920 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/3245 of AIIIBV compounds
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/20 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 29/201 including two or more compounds , e.g. alloys H01L29/2006 takes precedence
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/267 in different semiconductor regions , e.g. heterojunctions H01L29/263 takes precedence
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

Methods of forming semiconductor devices and fin field effect transistors (FinFETs), and FinFET devices, are disclosed. In some embodiments, a method of forming a semiconductor device includes forming a barrier material comprising AlInAsSb over a substrate, and forming a channel material of a transistor over the barrier layer.

Claims

1. A method of forming a semiconductor device, the method comprising:

forming a barrier material comprising AlInAsSb over a substrate; and

forming a channel material of a transistor over the barrier layer.

2. The method according to claim 1, wherein forming the barrier material comprises forming a barrier material comprising about 0.5% to about 15% of In.

3. The method according to claim 1, wherein forming the barrier material comprises forming a barrier material comprising a thickness of about 4 nm to about 80 nm.

4. The method according to claim 1, wherein forming the channel material comprises forming a channel material comprising a thickness of about 3 nm to about 40 nm.

5. The method according to claim 1, further comprising forming a template material over the substrate, before forming the barrier layer.

6. The method according to claim 5, wherein forming the template material comprises forming a template material comprising a thickness of about 10 nm to about 100 nm.

7. The method according to claim 1, wherein forming the channel material comprises epitaxially growing the channel material, and wherein the barrier material comprises a seed layer for the epitaxial growth of the channel material.

8. The method according to claim 1, wherein forming the channel material comprises forming a channel of a planar transistor or a fin field effect transistor (FinFET).

9. A method of forming a fin field effect transistor (FinFET) device, the method comprising:

forming shallow trench isolation (STI) regions in a substrate;

recessing a portion of the substrate between two of the STI regions;

forming a template material over the substrate;

forming a barrier material comprising AlInAsSb over the template material;

forming a channel material over the barrier layer;

recessing the STI regions, wherein a portion of the channel material disposed over top surfaces of remaining portions of the STI regions forms a semiconductor fin;

forming a gate dielectric on sidewalls and a top surface of the semiconductor fin; and

forming a gate electrode over the gate dielectric.

10. The method according to claim 9, further comprising deoxidizing the template material, before forming the barrier material.

11. The method according to claim 10, wherein deoxidizing the template material comprises heating the FinFET device in the presence of an As or P flux.

12. The method according to claim 10, wherein deoxidizing the template material comprises heating the FinFET device at a temperature of about 500 degrees C. to about 600 degrees C.

13. The method according to claim 10, further comprising monitoring the surface of the template material while deoxidizing the template material to ensure a stable surface reconstruction of the template material.

14. The method according to claim 13, wherein monitoring the surface of the template material comprises using reflection high-energy electron diffraction (RHEED).

15. The method according to claim 9, wherein forming the barrier material comprises introducing fluxes of As₂, Sb, In, and Al at a temperature of about 450 degrees C. to about 560 degrees C.

16-20. -20. (canceled)

21. A method of forming a semiconductor device, the method comprising:

forming a template material over a substrate, the template material absorbing lattice mismatches with the substrate;

epitaxially forming a barrier material over the template material, the barrier material having a lattice that is matched to the template material;

epitaxially forming a channel material over the barrier material, the channel material comprising a high mobility conductive or semiconductive material;

forming a gate dielectric over the channel material; and

forming a gate electrode over the gate dielectric.

22. The method of claim 21, wherein the epitaxially forming the channel material is performed using the barrier layer as a seed layer.

23. The method of claim 21, wherein the barrier material comprises In and is free of point defects.

24. The method of claim 21, wherein the barrier material comprises AlInAsSb.

25. The method of claim 21, wherein the channel material comprises a material selected from the group consisting of InAs, InGaAs, GaSb, InGaSb, InSb, and combinations thereof.