OPTICAL DISTANCE MEASUREMENT DEVICE

• US 20150260831A1
• Filed: 03/19/2015
• Published: 09/17/2015
• Est. Priority Date: 03/27/2012
• Status: Abandoned Application

• Current Assignee: Garmin Switzerland GmbH (Garmin Limited)
• Original Assignee: Pulsedlight, Inc. (Garmin Limited)
• Inventors: Lewis, Robert Alden
• Application Number:
  US14/663,313
• Publication Number:
  US 20150260831A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01S 17/10 using transmission of interrupted, pulse-modulated waves determination of distance by phase measurements G01S17/32
• CPC Class Codes: G01S 7/4865 Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak peak detection in noise, signal conditioning G01S7/487

Abstract

Optical range finders are configured to transmit optical bursts toward a target and detect a corresponding received burst. DC offset in the received burst due to square law detection can be offset based on a difference between high pass and low pass filtered portions of the received burst. Edge records associated with bursts can be obtained, and correlated with a reference signal or waveform to obtain a range estimate.

Claims

1. A range finding device, comprising a receiver that includes:

a detector configured to convert a received optical signal from an object into an analog signal;

an analog filter configured to apply a dc offset associated with the received analog signal over the duration of a received signal burst;

a zero-crossing detector configured to convert the received signal into binary logic states at successive sample points;

a correlator configured to compare a stored transmit code sequence with one or more stored edge detected signal records to produce a derivative of a delayed correlation function; and

a delay estimator configured to estimate a delay based on a zero-crossing point of the delayed correlation function.

2. The device according to claim 1, further comprising a transmitter configured to emit and direct one or more code sequence modulated optical bursts into at least one transmission channel to the object so as to produce the received optical signal.

3. The device according to claim 2, wherein said code modulated optical burst is a binary convolution sequence concatenated with a second binary code so as to define a code sequence with a 50% average duty cycle.

4. A device according to claim 3, wherein said second binary code is a two-slot pulse position code.

5. The device according to claim 2, wherein said transmitter comprises:

a differential driver configured to alternately activate one or more pairs of series and shut switches; and

a series switch and a shut switch;

an optical source with a negative terminal connected to the series switch and a positive terminal connected to a shunt switch; and

a voltage controlled current limiting element connected to the positive terminal of the optical source and shunt switch.

6. The device according to claim 1, wherein said correlator uses a transmit code sequence derived from a received signal stored using a transmission channel providing a zero delay reference signal from the transmitter.

7. A device according to claim 6, wherein said zero delay reference signal is provided by a dedicated optical transmitter with an enable signal.

8. The device according to claim 1, wherein said analog filter is configured to provide:

dc restoration so as to attenuate a received signal offset in the filter output prior to signal acquisition,

high-pass and low-pass filtering with roughly equal time constants, and subtraction of high and low pass filter outputs.

9. The device according to claim 8, wherein the dc restoration is based on the output duty cycle of the zero-crossing detector the zero crossing detector comprising:

a duty cycle detector;

a processor configured to generate an offset signal based on the measured and previous history of duty cycle measurements; and

a digital to analog converter providing a offset correction value.

10. The device according to claim 9, wherein the differential inputs of an analog comparator are coupled to produce a difference of the high-pass and low-pass function outputs.

11. The device according to claim 1, wherein said zero-crossing detector comprises an analog comparator and a clocked sampler.

12. The device according to claim 10, wherein the clocked sampling network comprises at least two delay line outputs with associated commonly clocked latches.

13. The device according to claim 10, wherein the clocked sampling network comprises at least two poly-phase clocked latches sharing a common input with phase shifting latches to bring the latch outputs into a common clock domain.

14. The device according to claim 1, wherein said correlator is configured to detect a signal edge based on a difference of positive or negative edge transitions at sample points associated with successive pairs of previous and present logic states of the zero-crossing detector, and further comprising:

a memory configured to store a record of received signal states, a record of the transmitter code sequence, and the correlation output; and

a multiplier and accumulator configured to generate data points associated with a delayed correlation function.

15. The device according to claim 14, wherein said correlator is configured to accumulate multiple edge detector records resulting from the transmission of more than one modulated optical burst.

16. The device according to claim 14, wherein said correlator is configured to store a sum of a present correlation and an accumulation of previous correlation data points.

17. The device according to claim 14, wherein said multiplier and accumulator comprise a single multiplier coupled to an output of the reference signal memories with a single accumulator to add partial products associated with a data point of the delayed correlation function.

18. The device according to claim 15, wherein said multiplier and accumulator comprise two parallel multipliers coupled to two successive elements stored within single addresses of the reference and signal memories with two associated accumulators each of which is configured to add half the partial products associated with a data point of the delayed correlation function.

19. The device according to claim 14, wherein said multiplier and accumulator comprises:

an n-by-n array of multiplier cells configured to produce the partial products associated with n successive correlation data points, wherein n is an integer greater than or equal to two; and

n summing elements to add the partial products associated with a correlation data points.

20. The device according to claim 19, wherein the said multiplier cells have two or more bits of resolution to multiply a signed reference value and a signed signal edge state.