CONFIGURABLE READ-MODIFY-WRITE ENGINE AND METHOD FOR OPERATING THE SAME IN A SOLID STATE DRIVE
First Claim
1. A method of writing host data to a storage device comprising a central processing unit (CPU), a self-organized fast release buffer (FRB), and a non-volatile memory, the storage device being in communication with a host, the method comprising:
- receiving, by the FRB, a command from the CPU to write the host data to a location in the non-volatile memory, the host data being associated with a first plurality of codewords (CWs);
allocating space, by the FRB, in a buffer memory of the FRB for storage of the first plurality of CWs;
storing, by the FRB, the first plurality of CWs into the allocated space in the buffer memory;
extracting, by the FRB, data from the stored first plurality of CWs;
organizing, by the FRB, the extracted data and the host data into a second plurality of CWs;
transferring, by the FRB, a second plurality of CWs to a plurality of physical addresses in the non-volatile memory; and
sending, by the FRB, the plurality of physical addresses to the CPU to update a logical-to-physical table.
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Accused Products
Abstract
A method of writing host data to a storage device including a central processing unit (CPU), a self-organized fast release buffer (FRB), and a non-volatile memory, the storage device being in communication with a host, the method including receiving a command from the CPU to write the host data to a location in the non-volatile memory, the host data being associated with a first plurality of codewords (CWs), allocating space in a buffer memory of the FRB for storage of the first CWs, storing the first CWs into the allocated space in the buffer memory, extracting data from the stored first CWs, organizing the extracted data and the host data into a second plurality of CWs, transferring a second CWs to a physical addresses in the non-volatile memory, and sending the plurality of physical addresses to the CPU to update a logical-to-physical table.
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Citations
20 Claims
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1. A method of writing host data to a storage device comprising a central processing unit (CPU), a self-organized fast release buffer (FRB), and a non-volatile memory, the storage device being in communication with a host, the method comprising:
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receiving, by the FRB, a command from the CPU to write the host data to a location in the non-volatile memory, the host data being associated with a first plurality of codewords (CWs); allocating space, by the FRB, in a buffer memory of the FRB for storage of the first plurality of CWs; storing, by the FRB, the first plurality of CWs into the allocated space in the buffer memory; extracting, by the FRB, data from the stored first plurality of CWs; organizing, by the FRB, the extracted data and the host data into a second plurality of CWs; transferring, by the FRB, a second plurality of CWs to a plurality of physical addresses in the non-volatile memory; and sending, by the FRB, the plurality of physical addresses to the CPU to update a logical-to-physical table. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A storage device configured to receive and store host data in response to a host write request, the storage device comprising a central processing unit (CPU), a self-organized fast release buffer (FRB), and a non-volatile memory, the FRB comprising:
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a processor; and a memory having stored thereon instructions that, when executed by the processor, cause the processor to perform; receiving a command from the CPU to write the host data to a location in the non-volatile memory, the host data being associated with a first plurality of codewords (CWs); allocating space in a buffer memory of the FRB for storage of the first plurality of CWs; storing the first plurality of CWs into the allocated space in the buffer memory; extracting data from the stored first plurality of CWs; organizing the extracted data and the host data into a second plurality of CWs; transferring a second plurality of CWs to a plurality of physical addresses in the non-volatile memory; and sending the plurality of physical addresses to the CPU to update a logical-to-physical table. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification