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SEMICONDUCTOR MEMORY DEVICE AND MEMORY CONTROLLER

  • US 20150262699A1
  • Filed: 08/27/2014
  • Published: 09/17/2015
  • Est. Priority Date: 03/17/2014
  • Status: Active Grant
First Claim
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1. A semiconductor memory device, comprising:

  • a plurality of string units, each of which includes a plurality of strings of memory cells connected in series;

    a controller configured to perform an erase operation on the string units, the erase operation including an erase verify operation that is performed per string unit; and

    a control circuit including a register that stores erase characteristic for at least one of the string units,wherein the control circuit is configured to output the erase characteristic in response to a command from a memory controller.

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