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STACKED SEMICONDUCTOR DEVICE

  • US 20150263088A1
  • Filed: 03/17/2014
  • Published: 09/17/2015
  • Est. Priority Date: 03/17/2014
  • Status: Active Grant
First Claim
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1. A stacked semiconductor device fabrication process comprising:

  • forming a lattice-fin upon a semiconductor substrate;

    forming a gate upon the semiconductor substrate surrounding a portion of the lattice-fin;

    forming vertically stacked self-aligned nanowires by selectively removing a plurality of layers from the lattice-fin, and;

    forming first epitaxy upon sidewalls of a plurality of vertically stacked self-aligned nanowires in a first nanowire group, the first epitaxy merging the first nanowire group in source and drain regions of the stacked semiconductor device.

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