LIQUID CRYSTAL DISPLAY

• US 20150268525A1
• Filed: 09/03/2014
• Published: 09/24/2015
• Est. Priority Date: 03/19/2014
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: LEE, Bong-Jun, SEO, Dong Wuuk, CHANG, Jong Woong, HEO, Yun
• Granted Patent: US 9,568,790 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio

Abstract

A liquid crystal display includes: a first substrate; a gate line and a common voltage line that are on the first substrate; a gate insulating layer on the gate line and the common voltage line; a semiconductor layer on the gate insulating layer; a data line and a drain electrode that are on the semiconductor layer; a pixel electrode on the data line and the drain electrode; a passivation layer on the pixel electrode; a common electrode on the passivation layer; a second substrate; and a liquid crystal layer interposed between the first and second substrates. The pixel electrode contacts the drain electrode via a first contact hole, the common electrode contacts the common voltage line via a second contact hole in the gate insulating layer and the passivation layer, and the first and second contact holes are adjacently disposed in a thin film transistor forming region.

Claims

1. A liquid crystal display comprising:

a first substrate;

a gate line and a common voltage line that are on the first substrate;

a gate insulating layer on the gate line and the common voltage line;

a semiconductor layer on the gate insulating layer;

a data line and a drain electrode that are on the semiconductor layer;

a pixel electrode on the data line and the drain electrode;

a passivation layer on the pixel electrode;

a common electrode on the passivation layer;

a second substrate; and

a liquid crystal layer interposed between the first and second substrates, wherein the pixel electrode contacts the drain electrode via a first contact hole,

the common electrode contacts the common voltage line via a second contact hole in the gate insulating layer and the passivation layer, and

the first and second contact holes are adjacently disposed in a thin film transistor forming region.

2. The liquid crystal display of claim 1, wherein

the common voltage line includes a horizontal portion traversing a middle of the pixel electrode, and a vertical portion vertically extending along the data line.

3. The liquid crystal display of claim 2, wherein

one end of the vertical portion of the common voltage line is provided with a common voltage line extension,

the common voltage line extension contacts the common electrode, and

the common voltage line extension is disposed in the thin film transistor forming region.

4. The liquid crystal display of claim 3, wherein

the gate line includes a first gate electrode and a second gate electrode, and

the semiconductor layer, a source electrode, and the drain electrode are disposed on the first gate electrode.

5. The liquid crystal display of claim 4, wherein

a column spacer is provided between the first and second substrates, and

the column spacer is disposed on the second gate electrode.

6. The liquid crystal display of claim 5, wherein

the second gate electrode is not provided in a region where the common voltage line extension is disposed, and

the common voltage line extension and the first gate electrode are adjacently disposed in an extending direction of the gate line.

7. The liquid crystal display of claim 6, wherein

an island-shaped gate electrode separated from the gate line is provided under the common voltage line extension.

8. The liquid crystal display of claim 1, wherein

a vertical portion of the common voltage line and a common voltage line extension are in only one of three adjacent pixels.

9. The liquid crystal display of claim 1, wherein

the data line is provided with a first bent portion and a second bent portion,

the first bent portion is bent to form an angle of about 6°

to 8°

with a vertical reference line perpendicular to an extending direction of the gate line, and

the second bent portion disposed in a middle of a pixel area is further bent to form an angle of about 7°

to 15°

with the first bent portion.

10. The liquid crystal display of claim 1, wherein

the pixel electrode has a planar shape like a plate.

11. The liquid crystal display of claim 10, wherein

the common electrode has a plurality of cutouts, and includes a plurality of branch electrodes defined by the plurality of cutouts.

12. The liquid crystal display of claim 1, wherein

the passivation layer is disposed between the pixel electrode and the data line and drain electrode, and the passivation layer comprise the first contact hole extending to the drain electrode.

13. The liquid crystal display of claim 12, wherein

the first contact hole in the passivation layer and the second contact hole through which the common electrode and the common voltage line contact each other are adjacently disposed in the thin film transistor forming region.

14. The liquid crystal display of claim 8, wherein

a black matrix is at an inner side of the second substrate.

15. The liquid crystal display of claim 14, wherein

the black matrix is a lattice that covers the gate line, a gate electrode, and the data line, and has the same shape in the three adjacent pixels.

16. The liquid crystal display of claim 15, wherein

the black matrix is not provided with an extension protruded toward a pixel electrode region.

17. The liquid crystal display of claim 1, wherein

the gate line and the common voltage line are formed by the same process, and are formed of the same material.

18. The liquid crystal display of claim 1, wherein

the first contact hole is provided closer to the data line, and

the second contact hole is provided further away from the data line.