CONNECTING USB TYPE-C DEVICES

• US 20150269102A1
• Filed: 03/24/2014
• Published: 09/24/2015
• Est. Priority Date: 03/24/2014
• Status: Active Grant

• Current Assignee: Nokia Technologies Oy (Nokia Corporation)
• Original Assignee: Nokia Corporation
• Inventors: Inha, Kai, Backman, Juha Reinhold, Talmola, Pekka, Toivanen, Timo J.
• Granted Patent: US 9,396,148 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/4256 using a clocked protocol

Abstract

In some example embodiments, there may be provided a method, which may include sending, by a user equipment, a first predetermined test pattern to a first accessory including a first connector, when the first accessory is in a first mode of operation; determining, by the user equipment, a configuration of the first accessory in the first mode by at least measuring a first time for the first predetermined test pattern to return from the first connector and a data loop at the first accessory; sending, by the user equipment, a second predetermined test pattern via at least the first connector; and determining, by the user equipment, a presence of a data loop extension, by at least measuring a second time for the second predetermined test pattern to return from the first connector and at least one of the data loop at the first accessory or the data loop extension.

Claims

1. A method comprising:

sending, by a user equipment, a first predetermined test pattern to a first accessory including a first connector, when the first accessory is in a first mode of operation;

determining, by the user equipment, a configuration of the first accessory in the first mode by at least measuring a first time for the first predetermined test pattern to return from the first connector and a data loop at the first accessory;

sending, by the user equipment, a second predetermined test pattern via at least the first connector; and

determining, by the user equipment, a presence of a data loop extension, by at least measuring a second time for the second predetermined test pattern to return from the first connector and at least one of the data loop at the first accessory or the data loop extension.

2. The method of claim 1, further comprising:

determining an extension control position at the data loop of the first accessory; and

sending at least one control bit to the extension control position to enable extension of the data loop at the first accessory to the data loop extension.

3. The method of claim 2, wherein the extension control position is determined based on the measured first time.

4. The method of claim 1, wherein the data loop extension comprises a memory at the first accessory, and wherein the memory comprises information about the first accessory.

5. The method of claim 1, wherein the data loop extension comprises a second data loop at a second accessory coupled to the first accessory.

6. The method of claim 1, wherein the first connector comprises a universal serial bus Type-C connector.

7. The method of claim 1, wherein the first mode comprises a special docking mode.

8. An apparatus comprising:

at least one input shift register;

at least one output shift register, wherein the at least one input shift register and the at least one output shift register are coupled to a first connector; and

at least one switch configured to feed data from the at least one input shift register to the at least one output shift register when the at least one switch is in a first state, the at least one switch configured to feed data from the at least one input shift register to an extension output when the at least one switch is in a second state, wherein the at least one switch is controlled based on at least one bit at an extension control position at the at least one input shift register, the at least one output shift register, or a combination thereof.

9. The apparatus of claim 8, wherein the extension output is coupled to a memory comprising information about the apparatus, and wherein the memory is further coupled to the at least one output shift register.

10. The apparatus of claim 8, wherein the extension output is coupled to a second connector.

11. A non-transitory computer-readable storage medium including computer program code, which when executed by at least one processor causes operations comprising:

sending a first predetermined test pattern to a first accessory including a first connector, when the first accessory is in a first mode of operation;

determining a configuration of the first accessory in the first mode by at least measuring a first time for the first predetermined test pattern to return from the first connector and a data loop at the first accessory;

sending a second predetermined test pattern via at least the first connector; and

determining a presence of a data loop extension, by at least measuring a second time for the second predetermined test pattern to return from the first connector and at least one of the data loop at the first accessory or the data loop extension.

12. (canceled)