SEMICONDUCTOR DEVICE, SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS

• US 20150270307A1
• Filed: 10/10/2013
• Published: 09/24/2015
• Est. Priority Date: 10/18/2012
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Umebayashi, Taku, Tatani, Keiji, Inoue, Hajime, Kanamura, Ryuichi
• Granted Patent: US 9,431,450 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/1469 Assemblies, i.e. hybrid integration

Abstract

A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

Claims

1. A semiconductor device comprising:

a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode;

a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together;

a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together; and

a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

2. The semiconductor device of claim 1, wherein the first semiconductor section, the second semiconductor section, and the third semiconductor section are stacked together in a manner such that the first wiring layer faces the second wiring layer or the second wiring layer faces the third wiring layer.

3. The semiconductor device of claim 2, further comprising:

a second conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

4. The semiconductor device of claim 3, wherein at least one wiring layer electrically connected by the second conductive material is different than the wiring layers electrically connected by the first conductive material.

5. The semiconductor device of claim 3, wherein at least one of the first conductive material and the second conductive material comprises two through holes which penetrate through at least one of the first semiconductor section and the second semiconductor section in a vertical direction;

and

wherein a first through hole of the first conductive material electrically connects to a wiring layer that is different than a wiring layer electrically connected by a second of the two through holes.

6. The semiconductor device of claim 3, wherein at least one of the first conductive material and the second conductive material comprises a single through hole which penetrates through at least one of the first semiconductor section and the second semiconductor section in a vertical direction such that the at least one of the first conductive material and the second conductive material electrically contact at least two wiring layers.

7. The semiconductor device of claim 1, wherein a metal wire of at least one of (i) the first wiring layer, (ii) the second wiring layer, and (ii) the third wiring layer is directly bonded to a metal wire in another wiring layer.

8. The semiconductor device of claim 7, wherein at least one of the wiring layers having a metal wire directly bonded is different than the wiring layers electrically connected by the first conductive material.

9. The semiconductor device of claim 1, further comprising a pad electrode for external connection.

10. The semiconductor device of claim 9, wherein the pad is disposed such that light is blocked from one or more transistors residing in the second semiconductor section.

11. The semiconductor device of claim 1, wherein the first semiconductor section comprises a sensor circuit, at least one of the second semiconductor section and the third semiconductor section comprises a logical circuit, and at least one of the second semiconductor section and the third semiconductor section comprises a memory circuit.

12. A backside illumination type solid-state imaging device comprising:

a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a circuit region and a pixel region;

a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together;

a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together; and

a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

13. The solid-state imaging device of claim 12, wherein the first semiconductor section, the second semiconductor section, and the third semiconductor section are stacked together in a manner such that the first wiring layer faces the second wiring layer or the second wiring layer faces the third wiring layer.

14. The solid-state imaging device of claim 13, further comprising:

a second conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

15. The solid-state imaging device of claim 14, wherein at least one of the first conductive material and the second conductive material comprises a single through hole which penetrates through at least one of the first semiconductor section and the second semiconductor section in a vertical direction such that the at least one of the first conductive material and the second conductive material electrically contact at least two wiring layers.

16. The solid-state imaging device of claim 12, wherein a metal wire of at least one of (i) the first wiring layer, (ii) the second wiring layer, and (ii) the third wiring layer is directly bonded to a metal wire in another wiring layer.

17. The solid-state imaging device of claim 12, wherein at least one of the wiring layers having a metal wire directly bonded is different than the wiring layers electrically connected by the first conductive material.

18. The solid-state imaging device of claim 12, further comprising a pad electrode for external connection, wherein the pad is disposed below the pixel region such that light is blocked from one or more transistors residing in the second semiconductor section.

19. The solid-state imaging device of claim 12, further comprising an interlayer insulating film disposed between at least two of the semiconductor sections.

20. The solid-state imaging device of claim 12, wherein the first semiconductor section comprises a sensor circuit, at least one of the second semiconductor section and the third semiconductor section comprises a logical circuit, and at least one of the second semiconductor section and the third semiconductor section comprises a memory circuit.

21. An electronic apparatus including:

an optical unit; and

(a) a solid-state imaging device including;

a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a circuit region and a pixel region;

a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together;

(b) a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together; and

(c) a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

22. The electronic apparatus of claim 21, wherein the first semiconductor section, the second semiconductor section, and the third semiconductor section are stacked together in a manner such that the first wiring layer faces the second wiring layer or the second wiring layer faces the third wiring layer.

23. The electronic apparatus of claim 22, further comprising:

a second conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication, wherein at least one wiring layer electrically connected by the second conductive material is different than the wiring layers electrically connected by the first conductive material.

24. The electronic apparatus of claim 23, wherein at least one of the first conductive material and the second conductive material comprises two through holes which penetrate through at least one of the first semiconductor section and the second semiconductor section in a vertical direction;

and wherein a first through hole of the first conductive material electrically connects to a wiring layer that is different than a wiring layer electrically connected by a second of the two through holes.

25. The electronic apparatus of claim 23, wherein at least one of the first conductive material and the second conductive material comprises a single through hole which penetrates through at least one of the first semiconductor section and the second semiconductor section in a vertical direction such that the at least one of the first conductive material and the second conductive material electrically contact at least two wiring layers.

26. The electronic apparatus of claim 23, wherein a metal wire of at least one of (i) the first wiring layer, (ii) the second wiring layer, and (ii) the third wiring layer is directly bonded to a metal wire in another wiring layer, and wherein at least one of the wiring layers having a metal wire directly bonded is different than the wiring layers electrically connected by the first conductive material.