THROUGH SILICON VIAS FOR BACKSIDE CONNECTION

• US 20150286318A1
• Filed: 03/31/2015
• Published: 10/08/2015
• Est. Priority Date: 04/04/2014
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Synaptics Incorporated
• Inventors: MOREIN, Stephen L., REYNOLDS, Joseph Kurth
• Granted Patent: US 10,042,488 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2203/04101 2.5D-digitiser, i.e. digitiser detecting the X/Y position of the input means, finger or stylus, also when it does not touch, but is proximate to the digitiser's interaction surface and also measures the distance of the input means within a short range in the Z direction, possibly with a separate measurement setup
• CPC Class Codes: G06F 2203/04103 Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

In an example, a method of processing an integrated circuit (IC) die including active circuitry formed on a substrate and a front side having a plurality of metal layers formed on the substrate. The method includes forming vias in a substrate of the IC die using a laser configured to drill the vias from the front side of the IC die. The method includes forming metal contacts on first metal pads, and metal interconnects between second metal pads and the vias, using an single electroplating process, where the first metal pads and the second metal pads are exposed parts of a top layer of the plurality of metal layers, and where the metal interconnects at least partially fill the vias. The method includes thinning the substrate of the IC die to expose the metal interconnects in the vias at a back side of the IC die opposite the front side.

Claims

1. A method of processing an integrated circuit (IC) die including active circuitry formed on a substrate, and a front side having a plurality of metal layers formed on the substrate, the method comprising:

forming vias in a substrate of the IC die using a laser configured to drill the vias from the front side of the IC die;

forming metal contacts on first metal pads, and metal interconnects between second metal pads and the vias, using an single electroplating process, where the first metal pads and the second metal pads are exposed parts of a top layer of the plurality of metal layers, and where the metal interconnects at least partially fill the vias; and

thinning the substrate of the IC die to expose the metal interconnects in the vias at a back side of the IC die opposite the front side.

2. The method of claim 1, wherein the step of forming the metal contacts on the first metal pads, and the metal interconnects between the second metal pads and the vias, comprises:

depositing a passivation layer on the front side of the IC die over the plurality of metal layers and within the vias;

etching the passivation layer to expose the first metal pads and the second metal pads;

depositing a metal seed layer on the front side of the IC die over the first metal pads, the second metal pads, and the passivation layer, and within the vias;

depositing a polymer layer over the metal seed layer;

etching the polymer layer to expose the seed layer on the first metal pads, the second metal pads, and within the vias; and

performing the single electroplating process to form the metal contacts and the metal interconnects.

3. The method of claim 2, wherein the step of forming the metal contacts on the first metal pads, and the metal interconnects between the second metal pads and the vias, further comprises:

removing the polymer layer; and

etching an exposed portion of the metal seed layer.

4. The method of claim 1, wherein the metal contacts and the metal interconnects comprise gold or copper.

5. The method of claim 1, further comprising:

soldering a flexible circuit to the exposed portions of the metal interconnects at the back side of the IC die.

6. The method of claim 5, further comprising:

mounting the IC die to a glass substrate such that the front side of the IC die faces the glass substrate and the metal contacts are electrically connected to traces formed on the glass substrate.

7. The method of claim 5, further comprising:

mounting IC die to a glass substrate such that the front side of the IC die faces the glass substrate;

wherein the metal contacts are arranged to form sensor electrodes of a capacitive sensor.

8. An integrated circuit (IC) die, comprising:

a substrate having a plurality of metal layers formed on a front side, the plurality of metal layers electrically coupled to active circuitry in the substrate;

laser-drilled vias disposed through the substrate;

metal contacts disposed on first metal pads, the first metal pads comprising exposed parts of a top layer of the plurality of metal layers;

metal interconnects disposed between second metal pads and the laser-drilled vias, the second metal pads comprising exposed parts of the top layer of the plurality of metal layers, the metal interconnects at least partially filling the laser-drilled vias; and

back side contacts disposed on a back side of the substrate, the back side contacts comprising exposed portions of the metal interconnects in the laser-drilled vias.

9. The IC die of claim 8, wherein the metal contacts and the metal interconnects comprise gold or copper.

10. The IC die of claim 9, wherein the metal contacts are configured for electrical connection to traces formed on a glass substrate.

11. The IC die of claim 8, wherein the metal contacts are arranged to form sensor electrodes of a capacitive sensor.

12. The IC die of claim 8, wherein back side contacts are configured for connecting to a flexible circuit.

13. The IC die of claim 8, wherein the active circuitry comprises a capacitive sensor device, the active circuitry coupled to at least a portion of the metal contacts to provide sensor signals from the capacitive sensor device.

14. The IC die of claim 13, wherein the active circuitry further comprises a display driver device, the active circuitry coupled to at least a portion of the metal contacts to provide display signals from the display driver device.

15. The IC die of claim 8, wherein the active circuitry comprises a fingerprint scanner device, the active circuitry coupled to at least a portion of the metal contacts to perform capacitive sensing.

16. The IC die of claim 8, wherein the active circuitry is coupled to the back side contacts through the metal interconnects.

17. The IC die of claim 16, further comprising:

a flexible circuit soldered to the back side contacts.

18. A display device, comprising:

a glass substrate;

display electrodes;

capacitive sensor electrodes;

traces disposed on the glass substrate coupled to the display electrodes and the capacitive sensor electrodes;

an integrated circuit (IC) die mounted to the glass substrate, the IC die including;

metal contacts on a front side of the IC die facing the glass substrate and electrically coupled to the traces, and back side contacts on a back side of the IC die opposite the front side and electrically coupled to through die vias (TDVs) in the IC die; and

a flexible circuit soldered to the back side contacts of the IC die.

19. The display device of claim 18, wherein the IC die further comprises metal interconnects on the front side of the IC die configured to electrically connect the TDVs to metal pads on a top metal layer of the IC die.

20. The display device of claim 18, wherein active circuitry of the IC die comprises at least one of a capacitive sensor device and a display driver device, the active circuitry coupled to at least a portion of the metal contacts to provide at least one of sensor signals from the capacitive sensor device or display signals from the display driver device.