BAD MEMORY UNIT DETECTION IN A SOLID STATE DRIVE

• US 20150287478A1
• Filed: 04/28/2014
• Published: 10/08/2015
• Est. Priority Date: 04/02/2014
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Chen, Zhengang, Cohen, Earl T., Haratsch, Erich F., Werner, Jeremy
• Granted Patent: US 9,443,616 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/07 Responding to the occurrence of a fault, e.g. fault tolerance
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2029/0403 during or with feedback to manufacture
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/26 Accessing multiple arrays G11C29/24 takes precedence
• CPC Class Codes: G11C 29/38 Response verification devices
• CPC Class Codes: G11C 29/42 using error correcting codes [ECC] or parity check
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/765 in solid state disks

Abstract

An apparatus comprising a memory and a controller. The memory is configured to process a plurality of read/write operations. The memory comprises a plurality of memory unit granularities each having a size less than a total size of the memory. The controller is configured to process a plurality of I/O requests to the memory units of the memory that are not marked as bad on a memory unit list. The controller is configured to track a plurality of bad blocks of the memory. The controller is configured to determine which of the memory units to mark as bad based on a test of whether a unit of memory larger than a block of the memory has failed. The test is based on a threshold of the bad blocks in the unit of memory.

Claims

1. An apparatus comprising:

a memory configured to process a plurality of read/write operations, said memory comprising a plurality of memory unit granularities each having a size less than a total size of said memory; and

a controller configured to (i) process a plurality of I/O requests to said memory units of said memory that are not marked as bad on a memory unit list, (ii) track a plurality of bad blocks of said memory, and (iii) determine which of said memory units to mark as bad based on a test of whether a unit of memory larger than a block of said memory has failed, wherein said test is based on a threshold of said bad blocks in said unit of memory.

2. The apparatus according to claim 1, wherein said test is performed (A) during a lifetime of said apparatus in a first mode, and (B) during a manufacturer self-test in a second mode.

3. The apparatus according to claim 2, wherein said test performed during said lifetime of said apparatus is performed on demand.

4. The apparatus according to claim 2, wherein said threshold of said test performed during said lifetime of said apparatus is based on a consecutive number of said blocks in said unit of memory that are determined to be bad.

5. The apparatus according to claim 2, wherein said test performed during said manufacturer self-test is embedded in procedures of said manufacturer self-test.

6. The apparatus according to claim 2, wherein said threshold of said test performed during said manufacturer self-test is based on a total number of said bad blocks in said unit of memory.

7. The apparatus according to claim 1, wherein said unit of memory larger than a block of said memory includes a die and a plane.

8. The apparatus according to claim 1, wherein said threshold of said test is a limit of a number of (A) program/erase errors in a first mode and (B) read errors in a second mode.

9. The apparatus according to claim 1, wherein said test tracks errors on blocks of said memory.

10. The apparatus according to claim 9, wherein said tracked errors are (A) program/erase errors in a first mode and (B) read errors in a second mode.

11. The apparatus according to claim 10, wherein said program/erase errors are tracked separately from said read errors.

12. The apparatus according to claim 1, wherein said controller is further configured to pro-actively respond to said memory units of said memory that are determined to be bad.

13. The apparatus according to claim 1, wherein said threshold of said test is adjustable.

14. The apparatus according to claim 1, wherein said controller comprises a solid-state drive (SSD) controller.

15. The apparatus according to claim 1, wherein said controller is further configured to implement memory page, memory block, memory plane, and memory die recovery error correction capability.

16. The apparatus according to claim 1, wherein said test checks a number of iterations to convergence and a number of bit errors.

17. The apparatus according to claim 1, wherein said test checks if communication can be established with said memory unit.

18. The apparatus according to claim 1, wherein said memory and said controller form a solid-state drive.

19. An apparatus comprising:

an interface configured to process a plurality of read/write operations to/from a memory; and

a control circuit configured to (i) process a plurality of I/O requests to memory units of said memory that are not marked as bad on a memory unit list, (ii) track a plurality of bad blocks of said memory, and (iii) determine which of said memory units to mark as bad based on a test of whether a unit of memory larger than a block of said memory has failed, wherein said test is based on a threshold of said bad blocks in said unit of memory.

20. A method for detecting bad memory units in a solid-state drive (SSD), comprising the steps of:

(A) processing a plurality of read/write operations to/from a memory;

(B) processing a plurality of I/O requests to memory units of said memory that are not marked as bad on a memory unit list;

(C) tracking a plurality of bad blocks of said memory; and

(D) determining which of said memory units to mark as bad based on a test of whether a unit of memory larger than a block of said memory has failed, wherein said test is based on a threshold of said bad blocks in said unit of memory.