STORAGE OPERATING SYSTEM

• US 20150301748A1
• Filed: 04/09/2015
• Published: 10/22/2015
• Est. Priority Date: 04/21/2014
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: LEE, HYUN-SEOB
• Application Number:
  US14/682,223
• Publication Number:
  US 20150301748A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

A storage system includes a plurality of unit storages each including at least one flash memory chip. Performance of at least a first storage of the unit storages is monitored. A first type of request for the first storage is processed using a second storage of the unit storages, instead of using the first storage, if the performance monitoring indicates that the first unit storage has reached an end-of-life state.

Claims

1. A method of operating a storage system including a plurality of unit storages each including at least one flash memory chip, the method comprising:

monitoring performance a first unit storage among the plurality of unit storages;

determining that the first unit storage is in a first state when a monitored performance value of the first unit storage exceeds a reference value; and

if a first type of request for the first unit storage is received subsequent to a determination that the first unit storage is in the first state, then using a second unit storage different from the first unit storage to process the first type of request.

2. The method of claim 1, wherein each of the plurality of unit storages includes a respective flash memory chip.

3. The method of claim 1, wherein each of the plurality of unit storages includes a respective solid state drive (SSD).

4. The method of claim 1, wherein monitoring performance of the first unit storage comprises monitoring at least one of:

the number of bad blocks;

the number of remappings of bad blocks to reserved blocks; and

the number of erasures of bad blocks of the first unit storage.

5. The method of claim 4, wherein the number of erasures of bad blocks of the first unit storage is determined by averaging the number of erasures of all or some of the plurality of memory blocks included in the first unit storage.

6. The method of claim 1, wherein monitoring performance of the first unit storage comprises measuring latency in processing a request for the first unit storage and input and output speed of the request for the first unit storage.

7. The method of claim 1, wherein determining that the first unit storage is in the first state comprises determining whether the first unit storage is in an end-of-life state.

8. The method of claim 1, wherein processing the first type of request using the second unit storage includes mapping a logic address included in the first type of request to a physical address of the second unit storage that is spare storage of the storage system.

9. The method of claim 1, wherein the first type of request is a write request.

10. The method of claim 9, wherein:

if a second type of request for the first unit storage is received subsequent to the determination that the first unit storage is in the first state, and the second type of request is a read request, then using the first unit storage to process the read request.

11. The method of claim 9, including:

copying all data stored in the first unit storage to the second unit storage in response to the write request; and

mapping logic addresses included in all requests for the first unit storage to physical addresses of the second unit storage once all the data stored in the first unit storage has been copied to the second unit storage.

12. The method of claim 9, including mapping logic addresses included in all the requests for the first unit storage to the physical addresses of the second unit storage when the storage system is in an idle state.

13. The method of claim 1, including:

if a second type of request for the first unit storage is received subsequent to a determination that the first unit storage is in the first state, the second type of request being different from the first type of request, then using the first unit storage to process the second type of request

14. A method of operating an SSD, the method comprising:

monitoring performance of each of a plurality of flash memory chips of the SSD including at least first and second flash memory chips;

determining, based on the monitoring, that a first flash memory chip among the plurality of flash memory chips is in an end-of-life state;

subsequent to determining that the first flash memory chip is in an end-of-life state, receiving a request for the first flash memory chip;

if the request is a write request, then using the second flash memory chip to process the write request; and

if the request is a read request, then using the first flash memory chip to process the read request.

15. The method of claim 14, including:

copying all data of the first flash memory chip to the second flash memory chip in response to at least one write request for the first flash memory chip occurring after it has been determined that the first flash memory chip is in an end-of-life state; and

replacing the first flash memory chip with the second flash memory chip once it has been determined that all the data of the first flash memory chip has been copied to the second flash memory chip.

16. A storage system comprising:

a plurality of flash memory chips including at least first and second flash memory chips; and

a controller communicatively connected with the plurality of flash memory chips and configured to;

monitor performance of and control the flash memory chips;

determine, based on the monitoring, whether the first flash memory chip is in an end-of-life state;

receive a write request for the first unit storage;

use the first flash memory chip to process the write request if the first flash memory chip has not been determined to be in the end-of-life state; and

use the second flash memory chip to process the write request if the first flash memory chip has been determined to be in the end-of-life state.

17. The storage system of claim 16, including:

a plurality of channels connecting the controller to the plurality of flash memory chips;

a first port able to connect the controller to a host and through which the write request may be received from the host; and

an auxiliary power supply configured to receive external power via a second port from the host or another source.

18. The storage system of claim 16, wherein the controller is configured to:

receive a read request for the first unit storage; and

use the first flash memory chip to process the read request after the first flash memory chip has been determined to be in the end-of-life state.

19. The storage system of claim 16, wherein the first flash memory chip or the second flash memory chip include comprises a three-dimensional memory array.

20. The storage system of claim 16, wherein the controller is configured to:

transfer data from the first flash memory chip to the second flash memory chip in response to the write request received when the first flash memory chip has been determined to be in the end-of-life state; and

replace the first flash memory chip with the second flash memory chip once the data has been transferred from the first flash memory chip to the second flash memory chip.