MULTIPLE-SERIES AMPLIFYING DEVICE

• US 20150303879A1
• Filed: 05/29/2012
• Published: 10/22/2015
• Est. Priority Date: 05/29/2012
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: MURAO, Yoji
• Granted Patent: US 9,438,173 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 2203/21106 An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• CPC Class Codes: H03F 2203/21157 A filter circuit being added at the output of a power amplifier stage
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602

Abstract

A multiple-series amplifying device (100) of the present invention includes multiple series of amplifiers (110, 120) which are formed in parallel so as to input and output signals individually. Each of multiple-series of amplifiers (110, 120) includes a plurality of semiconductor amplifying elements (111, 112, 121, 122) which are driven in parallel so as to amplify signals. A pair of semiconductor amplifying elements (112, 121) adjoining together in a pair of amplifiers (110, 120) is formed in a single package (130).

Claims

1. A multiple-series amplifying device comprising:

multiple series of amplifiers which are formed in parallel so as to input and output signals individually; and

a plurality of semiconductor amplifying elements which are configured to amplify signals when the multiple series of amplifiers are driven in parallel,

wherein at least a pair of semiconductor amplifying elements adjoining together in a pair of amplifiers is formed in a single package.

2. The multiple-series amplifying device according to claim 1, wherein the pair of semiconductor amplifying elements formed in the single package is partitioned via an electric isolation.

3. The multiple-series amplifying device according to claim 2, wherein the electric isolation used to partition the pair of semiconductor amplifying elements formed in the single package is made of a metal wall.

4. The multiple-series amplifying device according to claim 3, further comprising:

a printed circuit board used to form the amplifiers thereon;

a signal transmitting line, made of a microstrip line formed on the printed circuit board, which is configured to transmit a high-frequency signal to the amplifiers;

a ground pattern applied to the signal transmitting line formed on the printed circuit board; and

a metal pattern which is formed on the printed circuit board so as to connect the metal wall to the ground pattern.

5. The multiple-series amplifying device according to claim 4, wherein the amplifiers, the signal transmitting line, and the metal pattern are formed on a surface of the printed circuit boards, wherein the ground pattern is formed on a back of the printed circuit board, and wherein the metal pattern is connected to the ground pattern via via-holes formed in the printed circuit board.

6. The multiple-series amplifying device according to claim 1, wherein each of the multiple series of amplifiers includes a distributor used to distribute an input signal, a pair of semiconductor amplifying elements which is driven in parallel so as to amplify signals distributed thereto, and a combiner used to combine the amplified signals.

7. The multiple-series amplifying device according to claim 1, implementing a Doherty type in which one part of the plurality of semiconductor amplifying elements, included in each of the multiple series of amplifiers, functions as a carrier amplifier while another part functions as a peak amplifier.

8. The multiple-series amplifying device according to claim 7, implementing an asymmetrical Doherty type with a disproportional ratio between the number of semiconductor amplifying elements serving as the carrier amplifier and the number of semiconductor amplifying elements serving as the peak amplifier.

9. The multiple-series amplifying device according to claim 1, further comprising:

a power supply line which is configured to supply DC power to one semiconductor amplifying element among the pair of semiconductor amplifying elements formed in the single package; and

a power supply circuit which is configured to supply the DC power, supplied to one semiconductor amplifying element, to another semiconductor amplifying element,

wherein the power supply circuit allows the DC power to be transmitted therethrough but blocks a high-frequency current.

10. The multiple-series amplifying device according to claim 9, wherein the power supply circuit is made of a low-pass filter including a capacitor and coils.