TUNABLE DUPLEXING CIRCUIT

• US 20150303892A1
• Filed: 02/04/2015
• Published: 10/22/2015
• Est. Priority Date: 02/04/2014
• Status: Active Grant

• Current Assignee: Kyocera AVX Components San Diego Inc (Kyocera Corporation)
• Original Assignee: Ethertronics, Inc. (Kyocera Corporation)
• Inventors: Desclos, Laurent
• Granted Patent: US 9,391,582 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03H 17/08 Networks for phase shifting
• CPC Class Codes: H03H 2210/025 Capacitor
• CPC Class Codes: H03H 7/0161 Bandpass filters H03H7/12 takes precedence
• CPC Class Codes: H03H 7/1741 Comprising typical LC combinations, irrespective of presence and location of additional resistors when resistors are present, also classify in H03H7/06 - H03H7/07
• CPC Class Codes: H03H 7/1758 Series LC in shunt or branch path H03H7/1791 takes precedence
• CPC Class Codes: H03H 7/18 Networks for phase shifting
• CPC Class Codes: H03H 7/463 Duplexers
• CPC Class Codes: H03H 7/465 having variable circuit topology, e.g. including switches
• CPC Class Codes: H03J 2200/08 Calibration of receivers, in particular of a band pass filter
• CPC Class Codes: H03J 3/20 of single resonant circuit by varying inductance only or capacitance only

Abstract

A tunable duplexer circuit is described, wherein the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. A method is described where the duplexer circuit characteristics are optimized in conjunction with a specific antenna frequency response to provide additional out-of-band rejection in a communication system. Dynamic optimization of both the duplexer circuit and an active antenna system is described to provide improved out-of-band rejection when implemented in RF front-end circuits of communication systems. Other features and embodiments are described in the following detailed descriptions.

Claims

1. A tunable band-pass circuit comprising:

a first tuning section comprising;

a first inductor in series with a first tunable capacitor, the first tunable capacitor being further connected to ground;

a second tuning section comprising;

a second inductor, a first phase shifter, and a second tunable capacitor in a series configuration, with the second tunable capacitor being further connected to ground;

a third inductor connected in parallel across the second inductor and first phase shifter;

a first fixed capacitor positioned between the second inductor and the third inductor; and

a third tuning section comprising

a fourth inductor and a second fixed capacitor in a series configuration forming a first series LC circuit;

a fifth inductor and a third fixed capacitor in a series configuration forming a second series LC circuit;

a sixth inductor in series with a third tunable capacitor forming a third series LC circuit, a first terminal end of the third series LC circuit connected to a common junction of the first and second series LC circuits, and a second terminal end of the third series LC circuit being connected to ground;

a fourth fixed capacitor positioned between the first series LC circuit and the second series LC circuit;

the first, second, and third tuning sections being connected in series between a first port and a second port to form a band-pass frequency response.