APPARATUSES AND METHODS FOR MEMORY MANAGEMENT

• US 20150309741A1
• Filed: 04/25/2014
• Published: 10/29/2015
• Est. Priority Date: 04/25/2014
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Wang, Qi
• Granted Patent: US 9,715,345 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 11/141 for bus or memory accesses
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/22 Safety or protection circuits preventing unauthorised or accidental access to memory cells
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 29/74 using duplex memories, i.e. using dual copies

Abstract

Some embodiments include apparatuses and methods to select a target memory portion in a first memory location to store information. One such method can conditionally store the information in a second memory location when the information is stored in the target memory portion. Other embodiments are described.

Claims

1. A method comprising:

selecting a target memory portion in a first memory location to store information;

storing information in the target memory portion; and

conditionally storing the information in a second memory location when the information is stored in the target memory portion.

2. The method of claim 1, wherein the information is stored in the second memory location if the information is determined to be susceptible to being corrupted during storing of other information in the target memory portion.

3. The method of claim 1, wherein the information includes first information, and the first information is stored in the second memory location if the target memory portion is determined to be available to store second information in addition to the first information.

4. The method of claim 1, wherein the information is stored in the second memory location if the target memory portion has no stored information before the information is stored in the target memory portion.

5. The method of claim 1, further comprising:

indicating the information stored in the second memory location as no longer needed if the target memory portion has reached a storage capacity.

6. A method comprising:

storing first information in memory cells of a first memory location;

storing the first information in a second memory location concurrently with the storing of the first information in the memory cells; and

storing second information in the memory cells, wherein the first information remains stored in the memory cells after the second information is stored in the memory cells.

7. The method of claim 6, further comprising:

storing the second information in the second memory location concurrently with the storing of the second information in the memory cells.

8. The method of claim 7, further comprising:

storing third information in the memory cells, wherein the first information and the second information remain stored in the memory cells after the third information is stored in the memory cells.

9. A method comprising:

receiving first information;

selecting a target memory portion to store the first information;

storing the first information in the target memory portion; and

storing the first information in an additional memory portion if the first information is determined to be susceptible to being corrupted when second information is stored in the target memory portion after the first information is stored in the target memory portion, wherein storing the first information in the additional memory portion is performed before receiving a command to store the second information in the target memory portion.

10. The method of claim 9, wherein the first information is stored in the target memory portion currently with storing the first information in the additional memory portion.

11. The method of claim 10, wherein the first information is associated with a lower page among multiple pages of information to be stored in the target memory portion.

12. The method of claim 11, wherein the second information is associated with an upper page among the multiple pages.

13. An apparatus comprising:

a first memory location;

a second memory location; and

a module to store information in the first memory location and to conditionally store the information in the second memory location when the information is stored in the first memory location.

14. The apparatus of claim 13, wherein the module stores the information in the second memory location if the information is determined to be susceptible to being corrupted when other information is stored in the first memory location.

15. The apparatus of claim 13, wherein the module stores the information in a target memory location of the first memory location, and the module stores the information in the second memory location if a storage capacity of the target memory portion is not reached after the information is stored in the target memory portion.

16. The apparatus of claim 13, wherein the module is configured to conditionally store additional information in the second memory location.

17. The apparatus of claim 16, wherein the second memory location includes first memory cells and second memory cells, and the module is configured to store the information in the first memory cells and to store the additional information in the second memory cells.

18. The apparatus of claim 13, wherein the apparatus comprises at least one of a memory device and a memory controller.

19. An apparatus comprising:

a first memory location;

a second memory location; and

a module to store first information in memory cells included in a memory portion of the first memory location and to store the first information in the second memory location if the memory portion is determined to be available to store the second information in addition to the first information in the memory cells of the memory portion.

20. The apparatus of claim 19, wherein the module is configured to store the first information in the second memory location without copying the first information from the first memory location to the second memory location.

21. The apparatus of claim 19, wherein the memory cells share a same access line.