Memory Control System for a Non-Volatile Memory and Control Method
First Claim
1. A memory control system for controlling read and write operations of a non-volatile memory, wherein the memory control system comprises:
- a memory controller, which is adapted to implement a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data, wherein the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing; and
a power management unit, which is adapted to authorize or prevent the memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation.
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Abstract
A memory control system for controlling read and write operations of a non-volatile memory, wherein the memory control system comprises a memory controller that is adapted to implement a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data. In one example, the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing. The system also includes a power management unit, which is adapted to authorize or prevent the memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation.
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Citations
15 Claims
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1. A memory control system for controlling read and write operations of a non-volatile memory, wherein the memory control system comprises:
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a memory controller, which is adapted to implement a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data, wherein the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing; and a power management unit, which is adapted to authorize or prevent the memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of controlling read and write operations of a non-volatile memory, comprising:
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implementing a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data, wherein the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing; and authorizing or preventing a memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation. - View Dependent Claims (11, 12, 13, 14, 15)
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Specification