MECHANISM FOR FACILITATING WRITE TRACKING FOR FOLLOWING DATA EYE MOVEMENTS ACROSS CHANGING THERMAL CONDITIONS IN MEMORY SYSTEMS

• US 20150317228A1
• Filed: 06/15/2015
• Published: 11/05/2015
• Est. Priority Date: 06/29/2012
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: LIU, Tsun Ho, Schaefer, Andre, Ng, Hoi M., Murray, Guy R., Mikulchenko, Oleg, Gao, Xiaofang
• Granted Patent: US 10,853,216 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 11/3037 where the computing system component is a memory, e.g. virtual memory, cache accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G11C 11/406 Management or control of the refreshing or charge-regeneration cycles
• CPC Class Codes: G11C 11/40611 External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
• CPC Class Codes: G11C 11/4096 Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A mechanism is described for facilitating write tracking for following data eye movements across changing thermal conditions in memory systems according to one embodiment of the invention. A method of embodiments of the invention includes monitoring movements of a valid data eye associated with a memory device of a plurality of memory devices of a memory system at a computing system. The monitoring may include initiating write commands during one or more refresh periods associated with the valid data eye. The method may include determining drifting in the movement of the data eye, and correcting the drifting based on adjusting one or more existing phase interpolator values associated with the movements of the data eye.

Claims

1. A method comprising:

monitoring movements of a valid data eye associated with a memory device of a plurality of memory devices of a memory system at a computing system, wherein monitoring includes initiating write commands during one or more refresh periods associated with the valid data eye;

determining drifting in the movement of the data eye; and

correcting the drifting based on adjusting one or more existing phase interpolator (“

PI”

) values associated with the movements of the data eye.

2. The method of claim 1, wherein monitoring comprising checking a left edge and a right edge of the valid data eye, where checking begins with the left edge moving onwards the right edge.

3. The method of claim 1, wherein determining comprises:

searching one or more new PI values; and

comparing the one or more new PI values with a threshold value.

4. The method of claim 1, wherein adjusting the one or more exiting PI values includes updating the one or more existing PI values to the one or more new PI values, if the one or more new PI values are greater than the thread value.

5. The method of claim 1, further comprising restoring, during a refresh period, current parameters associated with the valid data eye if monitoring is expected to continue beyond the refresh period into a next refresh period.

6. The method of claim 5, further comprising initiating additional write commands during the next refresh period to continue monitoring movements of the valid data eye.

7. The method of claim 1, wherein drifting in the movement is caused by thermal variations in the memory device.

8. A memory controller comprising:

a write tracking mechanism having

first logic to monitor movements of a valid data eye associated with a memory device of a plurality of memory devices of a memory system at a computing system, wherein monitoring includes initiating write commands during one or more refresh periods associated with the valid data eye;

second logic to determine drifting in the movement of the data eye; and

third logic to correct the drifting based on adjusting one or more existing phase interpolator (“

PI”

) values associated with the movements of the data eye.

9. The memory controller of claim 8, wherein the first logic is further to check a left edge and a right edge of the valid data eye, where checking begins with the left edge moving onwards the right edge.

10. The memory controller of claim 8, wherein the second logic is further to:

search one or more new PI values; and

compare the one or more new PI values with a threshold value.

11. The memory controller of claim 8, wherein adjusting the one or more exiting PI values includes updating the one or more existing PI values to the one or more new PI values, if the one or more new PI values are greater than the thread value.

12. The memory controller of claim 8, wherein the third logic is further to restore, during a refresh period, current parameters associated with the valid data eye if monitoring is expected to continue beyond the refresh period into a next refresh period.

13. The memory controller of claim 12, wherein the first logic is further to initiate additional write commands during the next refresh period to continue monitoring movements of the valid data eye.

14. The memory controller of claim 8, wherein drifting in the movement is caused by thermal variations in the memory device.

15. A system comprising:

a plurality of memory devices at a computing system; and

a write tracking mechanism to

monitor movements of a valid data eye associated with a memory device of the plurality of memory devices, wherein monitoring includes initiating write commands during one or more refresh periods associated with the valid data eye,

determine drifting in the movement of the data eye, and

correct the drifting based on adjusting one or more existing phase interpolator (“

PI”

) values associated with the movements of the data eye.

16. The system of claim 15, wherein the write tracking mechanism is further to check a left edge and a right edge of the valid data eye, where checking begins with the left edge moving onwards the right edge.

17. The system of claim 15, wherein the write tracking mechanism is further to:

search one or more new PI values; and

compare the one or more new PI values with a threshold value.

18. The system of claim 15, wherein adjusting the one or more exiting PI values includes updating the one or more existing PI values to the one or more new PI values, if the one or more new PI values are greater than the thread value.

19. The system of claim 15, wherein the write tracking mechanism is further to restore, during a refresh period, current parameters associated with the valid data eye if monitoring is expected to continue beyond the refresh period into a next refresh period.

20. The system of claim 19, wherein the write tracking mechanism is further to initiate additional write commands during the next refresh period to continue monitoring movements of the valid data eye.

21. The system of claim 15, wherein drifting in the movement is caused by thermal variations in the memory device.

22. The system of claim 15, wherein the memory device comprises a graphic double data rate (GDDR) memory device.

23. At least one machine-readable medium comprising a plurality of instructions that in response to being executed on a computing device, causes the computing device to perform the following operations:

monitoring movements of a valid data eye associated with a memory device of a plurality of memory devices of a memory system at a computing system, wherein monitoring includes initiating write commands during one or more refresh periods associated with the valid data eye;

determining drifting in the movement of the data eye; and

correcting the drifting based on adjusting one or more existing phase interpolator (“

PI”

) values associated with the movements of the data eye.

24. The machine-readable of claim 23, wherein the instructions when executed, further cause the computing device to perform the following operation:

checking a left edge and a right edge of the valid data eye, where checking begins with the left edge moving onwards the right edge.

25. The machine-readable medium of claim 23, wherein the instructions when executed, further cause the computing device to perform the following operations:

searching one or more new PI values; and

comparing the one or more new PI values with a threshold value.

26. The machine-readable medium of claim 23, wherein the instructions when executed, further cause the computing device to perform the following operation:

updating the one or more existing PI values to the one or more new PI values, if the one or more new PI values are greater than the thread value.

27. The machine-readable medium of claim 23, wherein the instructions when executed, further cause the computing device to perform the following operation:

restoring, during a refresh period, current parameters associated with the valid data eye if monitoring is expected to continue beyond the refresh period into a next refresh period.

28. The machine-readable medium of claim 27, wherein the instructions when executed, further cause the computing device to perform the following operation:

initiating additional write commands during the next refresh period to continue monitoring movements of the valid data eye.

29. The machine-readable medium of claim 23, wherein drifting in the movement is caused by thermal variations in the memory device.