DIRECTIONAL CHEMICAL OXIDE ETCH TECHNIQUE

• US 20150318184A1
• Filed: 04/30/2014
• Published: 11/05/2015
• Est. Priority Date: 04/30/2014
• Status: Active Grant

• Current Assignee: Elpis Technologies Inc. (Wi-LAN Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Alptekin, Emre, Kanakasabapathy, Sivananda K., Ozcan, Ahmet S., Sardesai, Viraj Y., Tran, Cung D.
• Granted Patent: US 9,472,415 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665

Abstract

A method of forming a trench in an oxide layer; where the oxide layer is formed on top of a nitride layer. The trench is formed using an iterative etching technique until the nitride layer is exposed, each iterative etching step includes; using an isotropic etching technique to remove a portion of the oxide layer, the isotropic etching technique produces a byproduct that remains along a sidewall and a bottom of the trench, then using an anisotropic etching technique to remove the salt from the bottom of the trench, leaving salt on the sidewalls of the trench.

Claims

1. A method comprising:

forming a semiconductor structure including a source-drain region in a substrate and adjacent to a gate structure and a nitride layer on the source-drain region, wherein the gate structure includes a gate, a gate cap on a top surface of the gate, and a gate spacer on a sidewall surface of the gate;

forming a dielectric layer on the nitride layer and on the gate structure; and

forming a contact trench in the dielectric layer by iteratively etching until the nitride layer is exposed, each iterative etching step comprising;

removing a portion of the dielectric layer using an isotropic etching technique, the isotropic etching technique produces a byproduct that remains along a sidewall and a bottom of the contact trench; and

removing the byproduct from the bottom of the contact trench using an anisotropic etching technique.

2. The method of claim 1, wherein the isotropic etching technique is a chemical oxide removal.

3. The method of claim 1, wherein the anisotropic etching technique is a low bias anisotropic selective sputtering.

4. The method of claim 1, wherein the byproduct is an ammonium hexafluorosilicate.

5. The method of claim 1, further comprising:

forming a nitride trench in the nitride layer by iteratively etching until the source-drain region is exposed, each iterative etching step comprising;

oxidizing a portion of the nitride layer; and

removing the portion of the nitride layer that has been oxidized using an isotropic etching technique.

6. The method of claim 5, wherein gas cluster ion beams are used to oxidize the portion of the nitride layer.

7. The method of claim 5, wherein low bias oxygen plasma sources are used to oxidize the portion of the nitride layer.

8. The method of claim 5, wherein chemical oxide removal etching is used to remove the portion of the nitride layer that has been oxidized.

9. A method comprising:

forming a contact trench in a dielectric layer of a semiconductor structure, wherein the dielectric layer is above a nitride layer, the contact trench is a result of a collection of iterative etching steps performed until the nitride layer is exposed, each iterative etching step comprising;

removing a portion of the dielectric layer using an isotropic etching technique, the isotropic etching technique produces a byproduct that remains along a sidewall and a bottom of the contact trench; and

removing the byproduct from the bottom of the contact trench using an anisotropic etching technique.

10. The method of claim 9, wherein the isotropic etching technique is a chemical oxide removal.

11. The method of claim 9, wherein the anisotropic etching technique is a low bias anisotropic selective sputtering.

12. The method of claim 9, wherein the byproduct is an ammonium hexafluorosilicate.

13. The method of claim 9, further comprising:

forming a nitride trench in the nitride layer by iteratively etching until a lower region is exposed, each iterative etching step comprising;

oxidizing a portion of the nitride layer; and

removing the portion of the nitride layer that has been oxidized using an isotropic etching technique.

14. The method of claim 13, wherein gas cluster ion beams are used to oxidize the portion of the nitride layer.

15. The method of claim 13, wherein low bias oxygen plasma sources are used to oxidize the portion of the nitride layer.

16. The method of claim 13, wherein chemical oxide removal etching is used to remove the portion of the nitride layer that has been oxidized.

17. A method comprising:

forming a nitride layer on a structure;

forming a nitride trench in the nitride layer by iteratively etching until the structure is exposed, each iterative etching step comprising;

oxidizing a portion of the nitride layer; and

removing the portion of the nitride layer that has been oxidized by using an isotropic etching technique.

18. The method of claim 17, wherein gas cluster ion beams are used to oxidize the portion of the nitride layer.

19. The method of claim 17, wherein low bias oxygen plasma sources are used to oxidize the portion of the nitride layer.

20. The method of claim 17, wherein chemical oxide removal etching is used to remove the portion of the nitride layer that has been oxidized.