SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
First Claim
1. A semiconductor memory device comprising:
- a substrate;
a plurality of stack gate structures spaced apart from each other in a first direction parallel to a main surface of the substrate, each of the stack gate structures including insulating layers and gate electrodes that are alternately and repeatedly stacked on the substrate;
a plurality of vertical channel structures penetrating each of the stack gate structures; and
a source plug line disposed between the stack gate structures, the source plug line being in contact with the substrate and extending in a second direction intersecting the first direction,wherein the substrate being in contact with the source plug line includes a plurality of protruding regions arranged along the second direction,wherein each of the protruding regions has a first width, andwherein the protruding regions are spaced apart from each other by a first distance greater than the first width.
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Accused Products
Abstract
Semiconductor memory devices and methods of fabricating the same are provided. A semiconductor memory device includes stack gate structures that are spaced apart from each other in a first direction horizontal to a substrate. Each of the stack gate structures includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. Vertical channel structures penetrate the stack gate structures. A source plug line is provided between the stack gate structures. The source plug line is in contact with the substrate and extends in a second direction intersecting the first direction. The substrate being in contact with the source plug line includes a plurality of protruding regions formed along the second direction. Each of the protruding regions has a first width, and the protruding regions are spaced apart from each other by a first distance greater than the first width.
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Citations
21 Claims
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1. A semiconductor memory device comprising:
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a substrate; a plurality of stack gate structures spaced apart from each other in a first direction parallel to a main surface of the substrate, each of the stack gate structures including insulating layers and gate electrodes that are alternately and repeatedly stacked on the substrate; a plurality of vertical channel structures penetrating each of the stack gate structures; and a source plug line disposed between the stack gate structures, the source plug line being in contact with the substrate and extending in a second direction intersecting the first direction, wherein the substrate being in contact with the source plug line includes a plurality of protruding regions arranged along the second direction, wherein each of the protruding regions has a first width, and wherein the protruding regions are spaced apart from each other by a first distance greater than the first width. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor memory device comprising:
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a plurality of stack gate structures disposed on a substrate, each of the stack gate structures including insulating layers and gate electrodes that are alternately and repeatedly stacked on the substrate, and the stack gate structures being spaced apart from each other in a first direction; a plurality of vertical channel structures penetrating each of the stack gate structures; a source plug line disposed between the plurality of stack gate structures, the source plug line including a conductive material and extending in a second direction intersecting the first direction; and a common source region being in contact with the source plug line and disposed in the substrate, wherein the common source region comprises a first dopant region and a second dopant region that are alternately formed along the second direction, wherein the first dopant region has a first height and the second dopant region has a second height, and wherein the first height is greater than the second height. - View Dependent Claims (14, 15, 16, 17)
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18. A semiconductor memory device comprising:
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a plurality of vertical channel structures disposed on a substrate and extending in a direction vertical to the substrate; a plurality of stack gate structures surrounding the vertical channel structures and including gate electrodes stacked in the direction vertical to the substrate, the stack gate structures being spaced apart from each other in a first direction parallel to the substrate; and a common source region formed in the substrate and including a plurality of protruding regions that are formed along a second direction intersecting the first direction between the stack gate structures, wherein each of the protruding regions has a first width in the second direction, and wherein the protruding regions are spaced apart from each other by a first distance greater than the first width. - View Dependent Claims (19, 20)
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21-37. -37. (canceled)
Specification