SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

• US 20150318314A1
• Filed: 07/14/2015
• Published: 11/05/2015
• Est. Priority Date: 04/27/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Arai, Yasuyuki
• Granted Patent: US 9,419,026 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/133553 Reflecting elements associated to illuminating devices G02F1/133605
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1285 : using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/66537 : using a self aligned punch through stopper or threshold implant under the gate region H01L29/66606 takes precedence
• CPC Class Codes: H01L 29/78621 : with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78633 : with a light shield
• CPC Class Codes: H01L 29/78678 : with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78684 : having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys H01L29/7869 takes precedence
• CPC Class Codes: H01L 29/78696 : characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 : characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 : the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 : the pixel elements being capacitors
• CPC Class Codes: H10K 59/122 : Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 : Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 : Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/1315 : comprising structures specially adapted for lowering the resistance

Abstract

An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.

Claims

1. (canceled)

2. A display device including a pixel, the pixel comprising:

a first transistor;

a second transistor;

a capacitor; and

a light-emitting element,

wherein one of a source and a drain of the second transistor is electrically connected to the light-emitting element,

wherein the other of the source and the drain of the second transistor is electrically connected to a first wiring,

wherein a first electrode of the capacitor is electrically connected to a gate electrode of the second transistor,

wherein the capacitor does not overlap with the first wiring,

wherein a gate electrode of the first transistor is electrically connected to a second wiring,

wherein the first wiring comprises a first portion,

wherein the second wiring comprises a second portion, and

wherein the first portion is parallel to the second portion.

3. The display device according to claim 2, wherein the first wiring is configured to supply a power potential.

4. A display device including a pixel, the pixel comprising:

a first transistor;

a second transistor;

a capacitor; and

a light-emitting element,

wherein one of a source and a drain of the second transistor is electrically connected to the light-emitting element,

wherein the other of the source and the drain of the second transistor is electrically connected to a first wiring,

wherein a channel forming region of the second transistor and a second electrode of the capacitor is provided in the same semiconductor island,

wherein the capacitor does not overlap with the first wiring,

wherein a gate electrode of the first transistor is electrically connected to a second wiring,

wherein the first wiring comprises a first portion,

wherein the second wiring comprises a second portion, and

wherein the first portion is parallel to the second portion.

5. The display device according to claim 4, wherein the first wiring is configured to supply a power potential.