LOW NOISE PHASE LOCKED LOOPS

• US 20150318860A1
• Filed: 04/30/2014
• Published: 11/05/2015
• Est. Priority Date: 04/30/2014
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: WANG, Shen, YANG, Jeongsik, BICAKCI, Ara, SAVLA, Anup, NGUYEN, Thinh Cat
• Application Number:
  US14/266,730
• Publication Number:
  US 20150318860A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03L 2207/05 Compensating for non-linear characteristics of the controlled oscillator
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/0992 comprising a counter or a frequency divider
• CPC Class Codes: H03L 7/1976 using a phase accumulator for controlling the counter or frequency divider

Abstract

Aspects of circuits and methods for generating an oscillating signal are disclosed. The circuit includes a phase detector configured to output first and second signals responsive to a phase difference between two input signals. The phase detector is further configured to disable the first signal when outputting the second signal and to disable the second signal when outputting the first signal. The circuit further includes a voltage controlled oscillator (VCO) configured to generate an oscillating signal having a tunable frequency responsive to the first and second signals.

Claims

1. A circuit for generating an oscillating signal, comprising:

a phase detector configured to output first and second signals responsive to a phase difference between two input signals, the phase detector being further configured to disable the first signal when outputting the second signal and to disable the second signal when outputting the first signal;

a voltage controlled oscillator (VCO) configured to generate an oscillating signal having a tunable frequency responsive to the first and second signals.

2. The circuit of claim 1 further comprising a charge pump and a loop filter, wherein the charge pump is configured to provide a current source to the loop filter by sourcing a charge current in response to the first signal and sinking a discharge current in response to the second signal.

3. The circuit of claim 2 wherein the loop filter is configured to integrate the charging and discharging current to generate a control voltage for tuning the frequency of the VCO.

4. The circuit of claim 2 wherein the charge pump further comprises a leakage current source coupled to the loop filter.

5. The circuit of claim 1 wherein the phase detector comprises a gating circuit configured to disable the first signal when outputting the second signal and to disable the second signal when outputting first signal.

6. The circuit of claim 1 wherein the two input signals comprise a reference signal and a feedback signal, the feedback signal being derived from the oscillating signal.

7. The circuit of claim 6 further comprising a fractional-N divider configured to generate the feedback signal from the oscillating signal.

8. A circuit for generating an oscillating signal, comprising:

means for detecting a phase difference between two input signals, wherein the means for detecting a phase difference is configured to output first and second signals responsive to the phase difference between two input signals, and wherein the means for detecting a phase difference is further configured to disable the first signal when outputting the second signal and to disable the second signal when outputting the first signal;

means for generating an oscillating signal having a tunable frequency responsive to the first and second signals.

9. The circuit of claim 8 further comprising means for generating a control voltage for tuning the frequency of the oscillating signal, means for providing a current source to the means for generating a control voltage comprising means for sourcing a charge current in response to the first signal and means for sinking a discharge current in response to the second signal.

10. The circuit of claim 9 wherein the means for generating a control voltage is configured to integrate the charging and discharging current to generate the control voltage for tuning the frequency of the oscillating signal.

11. The circuit of claim 9 wherein the means for providing a current source further comprising means for providing a leakage current to the means for generating a control voltage.

12. The circuit of claim 8 wherein the means for detecting a phase difference comprises a gating circuit configured to disable the first signal when outputting the second signal and to disable the second signal when outputting first signal.

13. The circuit of claim 8 wherein the two input signals comprise a reference signal and a feedback signal, the feedback signal being a function of the oscillating signal.

14. The circuit of claim 13 further comprising means for generating the feedback signal by fractionally dividing the frequency of the oscillating signal.

15. A method of generating an oscillating signal, comprising:

detecting a phase difference between two input signals, the detecting comprising outputting first and second signals responsive to the phase difference between two input signals by disabling the first signal when outputting the second signal and to disabling the second signal when outputting the first signal;

generating an oscillating signal having a tunable frequency responsive to the first and second signals.

16. The method of claim 15 further comprising generating a control voltage for tuning the frequency of the oscillating signal, and providing a current source for generating the control voltage by sourcing a charge current in response to the first signal and sinking a discharge current in response to the second signal.

17. The method of claim 16 wherein the generating of a control voltage comprises integrating the charging and discharging current.

18. The method of claim 16 further comprising providing a leakage current to the generating of a control voltage.

19. The method of claim 15 wherein the detecting of a phase difference comprises using a gating circuit to disable the first signal when outputting the second signal and to disable the second signal when outputting first signal.

20. The method of claim 15 wherein the two input signals comprise a reference signal and a feedback signal, the feedback signal being a function of the oscillating signal.

21. The method of claim 20 further comprising generating the feedback signal by fractionally dividing the frequency of the oscillating signal.