DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD

• US 20150318868A1
• Filed: 06/03/2014
• Published: 11/05/2015
• Est. Priority Date: 06/12/2013
• Status: Abandoned Application

• Current Assignee: Saturn Licensing LLC (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: SHINOHARA, Yuji, YAMAMOTO, Makiko
• Application Number:
  US14/412,718
• Publication Number:
  US 20150318868A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03M 13/036 Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
• CPC Class Codes: H03M 13/1165 QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
• CPC Class Codes: H03M 13/118 Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure H03M13/1165 takes precedence
• CPC Class Codes: H03M 13/152 Bose-Chaudhuri-Hocquenghem [BCH] codes
• CPC Class Codes: H03M 13/255 with Low Density Parity Check [LDPC] codes
• CPC Class Codes: H03M 13/2707 Simple row-column interleaver, i.e. pure block interleaving
• CPC Class Codes: H03M 13/271 Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
• CPC Class Codes: H03M 13/2906 using block codes H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/356 Unequal error protection [UEP]
• CPC Class Codes: H03M 13/616 Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
• CPC Class Codes: H03M 13/6552 DVB-T2
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27

Abstract

The present technology relates to a data processing apparatus and a data processing method that are able to provide an LDPC code with a good error rate.

An LDPC encoder performs coding by an LDPC code having a code length of 16200 bits and a code rate of 12/15. The LDPC code includes an information bit and a parity bit, and a parity check matrix H is configured with an information matrix portion corresponding to the information bit of the LDPC code and a parity matrix portion corresponding to the parity bit. An information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table representing a position of an element of 1 in the information matrix portion at an interval of 360 columns. The present technology may be applied to a case of performing an LDPC coding and an LDPC decoding.

Claims

1. A data processing apparatus comprising:

a coding unit that encodes an information bit into an LDPC code having a code length of 16200 bits and a code rate of 12/15, based on a parity check matrix of a low density parity check (LDPC) code,

wherein the LDPC code includes an information bit and a parity bit,

wherein the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,

wherein the information matrix portion is represented by a parity check matrix initial value table, and

wherein the parity check matrix initial value table is a table representing positions of elements of 1 in the information matrix portion at an interval of 360 columns, and is

3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991 3124 3155

59 136 528 781 803 928 1293 1489 1944 2041 2200 2613 2690 2847

155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803 2885 3014

79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083 3101 3132

4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728 3045 3104

175 395 429 1027 1061 1068 1154 1168 1175 2147 2359 2376 2613 2682

1388 2241 3118 3148

143 506 2067 3148

1594 2217 2705

398 988 2551

1149 2588 2654

678 2844 3115

1508 1547 1954

1199 1267 1710

2589 3163 3207

1 2583 2974

2766 2897 3166

929 1823 2742

1113 3007 3239

1753 2478 3127

0 509 1811

1672 2646 2984

965 1462 3230

3 1077 2917

1183 1316 1662

968 1593 3239

64 1996 2226

1442 2058 3181

513 973 1058

1263 3185 3229

681 1394 3017

419 2853 3217

3 2404 3175

2417 2792 2854

1879 2940 3235

647 1704 3060.

2. The data processing apparatus according to claim 1,

wherein if a row of the parity check matrix initial table is represented by i and a parity length of the LDPC code is represented by M,

a (2+360×

(i−

1))-th column of the parity check matrix is a column obtained by cyclically shifting a (1+360×

(i−

1))-th column of the parity check matrix for which positions of elements of 1 are represented by the parity check matrix initial value table, by q=M/360 in a down direction.

3. The data processing apparatus according to claim 2,

wherein for a (1+360×

(i−

1))-th column of the parity check matrix, an i-th row of the parity check matrix initial value table represents row numbers of elements of 1 in a (1+360×

(i−

1))-th column of the parity check matrix, and

wherein for each column of (2+360×

(i−

1))-th column to (360×

i)-th column which are columns other than the (1+360×

(i−

1))-th column of the parity check matrix, if a numerical value in an i-th row and a j-th column of the parity check matrix initial value table is represented by h_i,j, and a row number of a j-th element of 1 in a w-th column of the parity check matrix H is represented by H_w-j, a row number H_w-j of an element of 1 in a w-th column which are columns other than the (1+360×

(i−

1))-th column of the parity check matrix is expressed by an equation H_w-j=mod {h_i,j+mod((w−

1),

     360)×

M/360, M).

4. The data processing apparatus according to claim 1, further comprising:

a parity interleave unit that interleaves only a parity bit of a code bit of the LDPC code.

5. The data processing apparatus according to claim 1, further comprising:

a column twist interleave unit that performs column twist interleave by storing a code bit of the LDPC code by shifting it in a column direction.

6. The data processing apparatus according to claim 1, further comprising:

a replacement unit that replaces a code bit of the LDPC code with a symbol bit of a symbol corresponding to any one of signal points of a predetermined number which is determined by a predetermined digital modulation scheme.

7. The data processing apparatus according to claim 6,

wherein the replacement unit replaces the code bit which is stored in the column direction and read in the row direction.

8. The data processing apparatus according to claim 1,

wherein the parity check matrix is a parity check matrix in which a cycle 4 does not exist.

9. The data processing apparatus according to claim 1,

wherein the parity check matrix is a parity check matrix of the LDPC code belonging to an ensemble of the LDPC code in which a performance threshold is a predetermined value or less, which e, the performance threshold being E_b/N₀ at which BER starts falling.

10. A data processing method comprising:

a coding step of encoding an information bit into an LDPC code having a code length of 16200 bits and a code rate of 12/15, based on a parity check matrix of a low density parity check (LDPC) code,

wherein the LDPC code includes an information bit and a parity bit,

wherein the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,

wherein the information matrix portion is represented by a parity check matrix initial value table, and

wherein the parity check matrix initial value table is a table representing positions of elements of 1 in the information matrix portion at an interval of 360 columns, and is

3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991 3124 3155

59 136 528 781 803 928 1293 1489 1944 2041 2200 2613 2690 2847

155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803 2885 3014

79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083 3101 3132

4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728 3045 3104

175 395 429 1027 1061 1068 1154 1168 1175 2147 2359 2376 2613 2682

1388 2241 3118 3148

143 506 2067 3148

1594 2217 2705

398 988 2551

1149 2588 2654

678 2844 3115

1508 1547 1959

1199 1267 1710

2589 3163 3207

1 2583 2974

2766 2897 3166

929 1823 2742

1113 3007 3239

1753 2478 3127

0 509 1811

1672 2646 2984

965 1462 3230

3 1077 2917

1183 1316 1662

968 1593 3239

64 1996 2226

1442 2058 3181

513 973 1058

1263 3185 3229

681 1394 3017

419 2853 3217

3 2404 3175

2417 2792 2854

1879 2940 3235

647 1704 3060.

11. A data processing apparatus comprising:

a decoding unit that decodes an LDPC code which is obtained from data transmitted from a transmission apparatus,

wherein the transmission apparatus includes

a coding unit that encodes an information bit into an LDPC code having a code length of 16200 bits and a code rate of 12/15, based on a parity check matrix of a low density parity check (LDPC) code,

wherein the LDPC code includes an information bit and a parity bit,

wherein the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,

wherein the information matrix portion is represented by a parity check matrix initial value table, and

wherein the parity check matrix initial value table is a table representing positions of elements of 1 in the information matrix portion at an interval of 360 columns, and is

3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991 3124 3155

59 136 528 781 803 928 1293 1489 1944 2041 2200 2613 2690 2847

155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803 2885 3014

79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083 3101 3132

4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728 3045 3104

175 395 429 1027 1061 1068 1154 1168 1175 2147 2359 2376 2613 2682

1388 2241 3118 3148

143 506 2067 3148

1594 2217 2705

398 988 2551

1149 2588 2654

678 2844 3115

1508 1547 1954

1199 1267 1710

2589 3163 3207

1 2583 2974

2766 2897 3166

929 1823 2742

1113 3007 3239

1753 2478 3127

0 509 1811

1672 2646 2984

965 1462 3230

3 1077 2917

1183 1316 1662

968 1593 3239

64 1996 2226

1442 2058 3181

513 973 1058

1263 3185 3229

681 1394 3017

419 2853 3217

3 2404 3175

2417 2792 2854

1879 2940 3235

647 1704 3060.

12. The data processing apparatus according to claim 11,

wherein if a row of the parity check matrix initial table is represented by i and a parity length of the LDPC code is represented by M,

a (2+360×

(i−

1))-th column of the parity check matrix is a column obtained by cyclically shifting a (1+360×

(i−

1))-th column of the parity check matrix for which positions of elements of 1 are represented by the parity check matrix initial value table, by q=M/360 in a down direction.

13. The data processing apparatus according to claim 12,

wherein for a (1+360×

(i−

1))-th column of the parity check matrix, an i-th row of the parity check matrix initial value table represents row numbers of elements of 1 in a (1+360×

(i−

1))-th column of the parity check matrix, and

wherein for each column of (2+360×

(i−

1))-th column to (360×

i)-th column which are columns other than the (1+360×

(i−

1))-th column of the parity check matrix, if a numerical value in an i-th row and a j-th column of the parity check matrix initial value table is represented by h_i,j, and a row number of a j-th element of 1 in a w-th column of the parity check matrix H is represented by H_w-j, a row number H_w-j of an element of 1 in a w-th column which are columns other than the (1+360×

(i−

1))-th column of the parity check matrix is expressed by an equation H_w-j=mod {h_i,j+mod((w−

1),

     360)×

M/360, M).

14. The data processing apparatus according to claim 11, further comprising:

a column twist deinterleave unit that when column twist interleave is performed by storing a code bit of the LDPC code by shifting it in a column direction, returns the code bit of the LDPC code to an original sequence so as to perform column twist deinterleave.

15. The data processing apparatus according to claim 11, further comprising:

a reverse replacement unit that when a replacement process of replacing a code bit of the LDPC code with a symbol bit of a symbol corresponding to any one of signal points of a predetermined number which is determined by a predetermined digital modulation scheme is performed, performs a reverse replacement process of returning the code bit of which a position as the symbol bit is replaced, to an original position.

16. The data processing apparatus according to claim 15,

wherein the reverse replacement unit performs a reverse replacement process of returning the code bit which is stored in the row direction and read in the column direction, to an original position.

17. The data processing apparatus according to claim 11,

wherein the parity check matrix is a parity check matrix in which a cycle 4 does not exist.

18. The data processing apparatus according to claim 11,

wherein the parity check matrix is a parity check matrix of the LDPC code belonging to an ensemble of the LDPC code in which a performance threshold is a predetermined value or less, which is detected by a density evolution of multi-edge type, here, the performance threshold being E_b/N₀ at which BER starts falling.

19. A data processing method comprising:

a decoding step of decoding an LDPC code which is obtained from data transmitted from a transmission apparatus,

wherein the transmission apparatus includes

a coding unit that encodes an information bit into an LDPC code having a code length of 16200 bits and a code rate of 12/15, based on a parity check matrix of a low density parity check (LDPC) code,

wherein the LDPC code includes an information bit and a parity bit,

wherein the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,

wherein the information matrix portion is represented by a parity check matrix initial value table, and

wherein the parity check matrix initial value table is a table representing positions of elements of 1 in the information matrix portion at an interval of 360 columns, and is

3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991 3124 3155

59 136 528 781 803 928 1293 1489 1944 2041 2200 2613 2690 2847

155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803 2885 3014

79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083 3101 3132

4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728 3045 3104

175 395 429 1027 1061 1068 1154 1168 1175 2147 2359 2376 2613 2682

1388 2241 3118 3148

143 506 2067 3148

1594 2217 2705

398 988 2551

1149 2588 2654

678 2844 3115

1508 1547 1954

1199 1267 1710

2589 3163 3207

1 2583 2974

2766 2897 3166

929 1823 2742

1113 3007 3239

1753 2478 3127

0 509 1811

1672 2646 2984

965 1462 3230

3 1077 2917

1183 1316 1662

968 1593 3239

64 1996 2226

1442 2058 3181

513 973 1058

1263 3185 3229

681 1394 3017

419 2853 3217

3 2404 3175

2417 2792 2854

1879 2940 3235

647 1704 3060.

20. A data processing apparatus comprising:

a decoding unit that decodes an LDPC code having a code length of 16200 bits and a code rate of 12/15, based on a parity check matrix of a low density parity check (LDPC) code,

wherein the LDPC code includes an information bit and a parity bit,

wherein the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,

wherein the information matrix portion is represented by a parity check matrix initial value table, and

wherein the parity check matrix initial value table is a table representing positions of elements of 1 in the information matrix portion at an interval of 360 columns, and is

3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991 3124 3155

59 136 528 781 803 928 1293 1489 1944 2041 2200 2613 2690 2847

155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803 2885 3014

79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083 3101 3132

4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728 3045 3104

175 395 429 1027 1061 1068 1154 1168 1175 2147 2359 2376 2613 2682

1388 2241 3118 3148

143 506 2067 3148

1594 2217 2705

398 988 2551

1149 2588 2654

678 2844 3115

1508 1547 1954

1199 1267 1710

2589 3163 3207

1 2583 2974

2766 2897 3166

929 1823 2742

1113 3007 3239

1753 2478 3127

0 509 1811

1672 2646 2984

965 1462 3230

3 1077 2917

1183 1316 1662

968 1593 3239

64 1996 2226

1442 2058 3181

513 973 1058

1263 3185 3229

681 1394 3017

419 2853 3217

3 2404 3175

2417 2792 2854

1879 2940 3235

647 1704 3060.