Implementing a Power Off State in a Computing Device

• US 20150323983A1
• Filed: 07/27/2012
• Published: 11/12/2015
• Est. Priority Date: 07/27/2012
• Status: Active Grant

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Hobson, Louis B.
• Granted Patent: US 9,619,015 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3234 Power saving characterised by the action undertaken
• CPC Class Codes: G06F 1/3246 by software initiated power-off
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 9/4418 Suspend and resume; Hibernate and awake
• CPC Class Codes: G06F 9/442 Shutdown
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

Example embodiments disclosed herein relate to implementing a power down state in a computing device. A sleep command is issued to place a computing device in a sleep state in response to receipt of a power off command at the computing device. Content of memory of the computing device is written to non-volatile storage of the computing device and the computing device is placed in a power off state.

Claims

1. A computing device comprising:

an operating system to;

issue a sleep command to place the computing device in a sleep state in response to the computing device receiving a power off command;

write contents of memory of the computing device to non-volatile storage of the computing device;

a controller to issue a power off command to place the computing device in a power off state in response to determining that the power off command triggered the sleep command.

2. The computing device of claim 1, further comprising a power controller to execute the power off command.

3. The computing device of claim 2, wherein the power controller implements advanced configuration and power interface (ACPI).

4. The computing device of claim 1, wherein the power off command comprises at least one of a user command to shutdown the computing device, a time out command, and a power off instruction executed by an application.

5. The computing device of claim 1, wherein the sleep state is an ACPI S4 sleep state and the power off state is an ACPI S5 power state.

6. The computing device of claim 1, wherein the operating system is further to:

write a sleep state indicator to a first register; and

invoke a prepare-to-sleep (PTS) method in response to the computing device receiving a sleep command from the operating system,

wherein the operating system does not invoke the PTS method in response to the computing device receiving the power off command.

7. The computing device of claim 6, the controller comprising logic to determine whether the PTS method is invoked by the operating system, wherein the controller is to write a power off state indicator to a second register when the PTS method is not invoked.

8. The computing device of claim 7, wherein the second register is an ACPI sleep-type register indicating an ACPI sleep-type to be implemented.

9. The computing device of claim 1, wherein the controller is further to implement an S5 maximum power savings, and wherein wake events and management services of the computing device are disabled.

10. A method comprising:

issuing a sleep command from an operating system of a computing device in response to detecting a power off command for the computing device;

writing contents of memory of the computing device to non-volatile storage of the computing device;

placing the computing device in a power off state responsive to writing the contents of memory to the non-volatile storage.

11. The method of claim 10, wherein the sleep state is an advanced configuration and power interface (ACPI) S4 sleep state and wherein the power off state is an ACPI S5 power state.

12. The method of claim 10, further comprising placing the computing device in the power off state responsive to determining that the power off command for the computing device triggered the sleep command by the operating system.

13. The method of claim 12, wherein determining that the power off command triggered the sleep command comprises:

determining whether the operating system invokes a prepare-to-sleep (PTS) method; and

when the operating system does not invoke the PTS method, writing a power off state indicator to a sleep-type register.

14. The method of claim 13, wherein when the operating system invokes the PTS method,

determining that a sleep command for the computing device triggered the sleep command by the operating system,

writing a sleep state indicator to the sleep-type register, and

placing the computing device in the sleep state.

15. The method of claim 13, wherein the sleep-type register is an ACPI sleep-type register of a power controller that indicates a power state to be executed by the power controller.

16. The method of claim 10, further comprising implementing an S5 maximum power savings, wherein wake events and management services of the computing device are disabled during the S5 maximum power savings.

17. The method of claim 10, further comprising:

waking the computing device from the power off state; and

writing contents of the non-volatile storage to memory responsive to determining that the non-volatile memory contains data.

18. The method of claim 17, wherein determining that non-volatile memory contains data comprises determining if the operating system is configured to store contents of memory to the non-volatile storage prior to implementing an ACPI power state, and

19. A non-transitory computer readable medium comprising instructions that, when executed by a processor of a computing device, cause the processor to:

issue a sleep command to place the computing device in a sleep state in response to detecting a power off command for the computing device;

write contents of memory of the computing device to non-volatile storage of the computing device;

place the computing device in a power off state responsive to writing the contents of memory to the non-volatile storage.

20. The non-transitory computer readable medium of claim 19, further comprising instructions executable by the processor to execute an advanced configuration and power interface (ACPI) S5 maximum power savings process, wherein the computing device is powered down to approximately 0.5 W power consumption, and wherein wake events and management services of the computing device are disabled during the maximum S5 power savings.