SCHOTTKY DIODE

• US 20150333191A1
• Filed: 07/28/2015
• Published: 11/19/2015
• Est. Priority Date: 09/11/2011
• Status: Active Grant

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Henning, Jason Patrick, Zhang, Qingchun, Ryu, Sei-Hyung, Agarwal, Anant Kumar, Palmour, John Williams, Allen, Scott
• Granted Patent: US 9,865,750 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05567 the external layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12032 Schottky diode
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]

Abstract

The present disclosure generally relates to a Schottky diode that has a substrate, a drift layer provided over the substrate, and a Schottky layer provided over an active region of the drift layer. The metal for the Schottky layer and the semiconductor material for the drift layer are selected to provide a low barrier height Schottky junction between the drift layer and the Schottky layer.

Claims

1. A semiconductor device comprising:

a drift layer having a first surface with an active region and a plurality of junction barrier element recesses, the drift layer being doped with a doping material of a first conductivity type and associated with an edge termination region that is substantially laterally adjacent the active region, wherein the edge termination region comprises a plurality of guard rings;

a Schottky layer over the active region of the first surface to form a Schottky junction; and

a plurality of first doped regions that extend into the drift layer about corresponding ones of the plurality of junction barrier element recesses wherein the plurality of first doped regions are doped with a doping material of a second conductivity type, which is opposite the first conductivity type, and form an array of junction barrier elements in the drift layer below the Schottky junction.

2. The semiconductor device of claim 1 wherein each of the plurality of junction barrier element recesses has at least one side and a bottom and each of the plurality of first doped regions extends into the drift layer about the at least one side and the bottom of a corresponding one of the plurality of junction barrier element recesses.

3. The semiconductor device of claim 1 wherein junction barrier elements in the array of junction barrier elements are separated from one another within the drift layer.

4. The semiconductor device of claim 1 wherein a depth of at least one of the plurality of junction barrier element recesses is at least 0.1 microns.

5. The semiconductor device of claim 4 wherein a width of at least one of the plurality of junction barrier element recesses is at least 0.5 microns.

6. The semiconductor device of claim 1 wherein a width of at least one of the plurality of junction barrier element recesses is at least 0.5 microns.

7. The semiconductor device of claim 1 wherein at least some of the plurality of guard rings are second doped regions that extend into the drift layer, and the second doped regions are doped with the doping material of the second conductivity type.

8. The semiconductor device of claim 7 wherein guard rings in the plurality of guard rings are separated from each other within the drift layer.

9. The semiconductor device of claim 7 wherein a recess well is formed in the drift layer in the edge termination region, and the recess well is doped with the doping material of the second conductivity type.

10. The semiconductor device of claim 1 wherein the Schottky layer is formed from a low barrier height capable metal.

11. The semiconductor device of claim 10 wherein the low barrier height capable metal of the Schottky layer comprises tantalum.

12. The semiconductor device of claim 10 wherein the low barrier height capable metal of the Schottky layer comprises at least one of a group consisting of titanium, chromium, and aluminum.

13. The semiconductor device of claim 10 wherein the low barrier height capable metal of the Schottky layer consists essentially of tantalum.

14. The semiconductor device of claim 1 wherein the Schottky junction has a barrier height of less than 0.9 electron volts.

15. The semiconductor device of claim 1 wherein the drift layer is formed over a thinned substrate that was thinned after the drift layer was formed and a cathode contact is formed over a bottom surface of the thinned substrate.

16. The semiconductor device of claim 1 wherein the drift layer is predominantly doped with the doping material of the first conductivity type in a graded fashion wherein the drift layer has a lower doping concentration near the first surface and an intentionally higher doping concentration near a second surface of the drift layer, the second surface being substantially opposite the first surface.

17. The semiconductor device of claim 1 wherein the drift layer comprises silicon carbide.

18. The semiconductor device of claim 1 wherein the drift layer and the Schottky layer are part of a Schottky diode.

19. The semiconductor device of claim 18 wherein when forward biased, the semiconductor device supports a DC current density of at least 440 amperes/cm.

20. The semiconductor device of claim 18 wherein when forward biased, the semiconductor device supports a DC current density of at least 500 amperes/cm.

21. The semiconductor device of claim 18 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.275 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

22. The semiconductor device of claim 18 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.3 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

23. The semiconductor device of claim 18 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.35 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

24. The semiconductor device of claim 1 wherein the drift layer and the Schottky layer are part of a silicon carbide Schottky diode.

25. The semiconductor device of claim 1, wherein Schottky layer is disposed within at least one recess of the plurality of junction barrier element recesses.