OXIDE THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE

• US 20150340504A1
• Filed: 11/03/2014
• Published: 11/26/2015
• Est. Priority Date: 11/05/2013
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: CHOI, Hyun Sic, IM, Yun Sik
• Granted Patent: US 9,520,422 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/467 using masks
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An oxide thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method comprises: forming a gate electrode (1), a gate insulating layer (4) and an oxide semiconductor thin film (10) sequentially on a substrate; forming a first photoresist (11a) above an active layer region of the oxide semiconductor thin film (10), such that a thickness of the first photoresist above a channel region is greater than a thickness of the first photoresist above a non-channel region; reserving the first photoresist (11a) above the channel region; forming a source-drain metal thin film and a second photoresist (11b) sequentially on a pattern of an active layer, removing a portion of the source-drain metal thin film and a portion of the second photoresist (11b), such that an edge of the first photoresist (11a) above the channel region is covered with the source-drain metal thin film; and obtaining patterns of a source electrode and a drain electrode. Upon preliminary patterns of the source electrode and the drain electrode are formed, the photoresist instead of a protective layer is used to protect the active layer, therefore shortening a length of a channel of the oxide thin film transistor.

Claims

1. A manufacturing method of oxide thin film transistor, comprising:

forming a gate electrode and a gate insulating layer sequentially on a substrate;

forming an oxide semiconductor thin film on the gate insulating layer, and forming a first photoresist above an active layer region of the oxide semiconductor thin film, wherein a thickness of the first photoresist above a channel region is greater than a thickness of the first photoresist above a non-channel region;

removing the oxide semiconductor thin film of an non-active layer region to form a pattern of an active layer, removing the first photoresist above the non-channel region, and reserving the first photoresist above the channel region;

forming a source-drain metal thin film and a second photoresist sequentially on the pattern of the active layer, removing a portion of partial source-drain metal thin film corresponding to the first photoresist above the channel region and a portion of partial second photoresist corresponding to the first photoresist above the channel region, such that an edge of the first photoresist above the channel region is covered by the source-drain metal thin film;

lifting off the remaining second photoresist, the source-drain metal thin film covering the edge of the first photoresist above the channel region, and the first photoresist above the channel region to form patterns of a source electrode and a drain electrode.

2. The method according to claim 1, wherein the first photoresist is formed on the oxide semiconductor thin film;

the first photoresist above the non-active layer region is fully exposed and developed, the first photoresist above the non-channel region of the active layer region is partially exposed and developed, and the first photoresist above the channel region is not exposed and developed by a half-tone mask to form a photoresist of the active layer region.

3. The method according to claim 1, wherein the oxide semiconductor thin film of the non-active layer region is removed by a patterning process to obtain the pattern of the active layer;

and the first photoresist above the non-channel region is removed by an ashing process to reserve the first photoresist above the channel region.

4. The method according to claim 1, wherein a length of a channel in the oxide layer thin film transistor is in a range of 5 μ

m to 7 μ

m.

5. The method according to claim 4, wherein the length of the channel in the oxide layer thin film transistor is in a range of 5 μ

m to 6 μ

m.

12. The method according to claim 2, wherein a length of a channel in the oxide layer thin film transistor is in a range of 5 μ

m to 7 μ

m.

13. The method according to claim 12, wherein the length of the channel in the oxide layer thin film transistor is in a range of 5 μ

m to 6 μ

m.

14. The method according to claim 3, wherein a length of a channel in the oxide layer thin film transistor is in a range of 5 μ

m to 7 μ

m.

15. The method according to claim 12, wherein the length of the channel in the oxide layer thin film transistor is in a range of 5 μ

m to 6 μ

m.

6. An oxide thin film transistor, comprising:

a gate electrode, a gate insulating layer formed on one side of the gate electrode, and an active layer formed on one side of the gate insulating layer away from the gate electrode,

wherein a source electrode and a drain electrode are formed on one side of the active layer away from the gate insulating layer, the source electrode and the drain electrode are both directly connected with the active layer, and the active layer is made of an oxide semiconductor material.

7. The oxide thin film transistor according to claim 6, wherein a length of a channel between the source electrode and the drain electrode is in a range of 5 μ

m to 7 μ

m.

8. The oxide thin film transistor according to claim 7, wherein the length of the channel between the source electrode and the drain electrode is in a range of 5 μ

m to 6 μ

m.

9. An array substrate comprising the oxide thin film transistor according to claim 6.

10. The array substrate according to claim 9, further comprising:

a resin layer and a passivation layer;

wherein the resin layer covers the source electrode, the drain electrode and the channel between the source electrode and the drain electrode; and

the passivation layer is located on one side of the resin layer away from the source electrode and the drain electrode.

11. A display device comprising the array substrate according to claim 9.

16. An array substrate comprising the oxide thin film transistor according to claim 7.

17. An array substrate comprising the oxide thin film transistor according to claim 8.

18. A display device comprising the array substrate according to claim 10.