High di/dt Capacity Measurement Hardware
First Claim
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1. A hardware test system, comprising:
- a board comprising an insulating member and electrically conductive traces insulated from one another by the insulating member;
an energy storage system attached to the board, the energy storage system having first and second terminals at different polarities, the first terminal being connected to a first one of the traces and the second terminal being connected to a second one of the traces;
a control unit attached to the board and electrically connected to the first trace;
a DUT (device under test) input terminal attached to the same side of the board as the control unit and electrically connected to the control unit;
a DUT output terminal attached to the same side of the board as the control unit and electrically connected to the second trace; and
an electrical pathway from the first terminal to the second terminal of the energy storage system through the first trace, the control unit, the DUT and the second trace, the electrical pathway having a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500A/μ
s and a minimum parasitic inductance of less than 100 nH.
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Abstract
Hardware test systems are provided that have an electrical test loop with a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500A/μs and a minimum parasitic inductance of less than 100 nH. The hardware tests systems can be used for commutation measurement or other test applications requiring low stray inductance.
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Citations
21 Claims
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1. A hardware test system, comprising:
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a board comprising an insulating member and electrically conductive traces insulated from one another by the insulating member; an energy storage system attached to the board, the energy storage system having first and second terminals at different polarities, the first terminal being connected to a first one of the traces and the second terminal being connected to a second one of the traces; a control unit attached to the board and electrically connected to the first trace; a DUT (device under test) input terminal attached to the same side of the board as the control unit and electrically connected to the control unit; a DUT output terminal attached to the same side of the board as the control unit and electrically connected to the second trace; and an electrical pathway from the first terminal to the second terminal of the energy storage system through the first trace, the control unit, the DUT and the second trace, the electrical pathway having a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500A/μ
s and a minimum parasitic inductance of less than 100 nH. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A hardware test system, comprising:
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a first board comprising a first electrically conductive sheet, an insulating sheet on the first electrically conductive sheet and a second electrically conductive sheet on the insulating sheet, the insulating sheet electrically insulating the first and second electrically conductive sheets from one another; an energy storage system comprising one or more first cells disposed below the first electrically conductive sheet and one or more second cells disposed above the second electrically conductive sheet, each of the first cells having a first terminal connected to the first electrically conductive sheet and a second terminal connected to the second electrically conductive sheet, each of the second cells having a first terminal connected to the first electrically conductive sheet and a second terminal connected to the second electrically conductive sheet, the first terminals of the first and second cells being at a different polarity than the second terminals of the first and second cells; a second board disposed on the second electrically conductive sheet and comprising; a first terminal connected to the first electrically conductive sheet; a second terminal connected to the second electrically conductive sheet; a DUT (device under test) interface; and a control unit operable to control operation of a DUT connected to the DUT interface; and an electrical pathway from the first terminals of the first and second cells to the second terminals of the first and second cells through the first electrically conductive sheet, the control unit, the DUT and the second electrically conductive sheet, the electrical pathway having a minimum length of less than 100 mm, a maximum di/dt capacity of at least 2000A/μ
s and a minimum parasitic inductance of less than 50 nH. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A hardware test system comprising an electrical test loop having a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500A/μ
- s and a minimum parasitic inductance of less than 100 nH.
Specification