SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

• US 20150349496A1
• Filed: 04/28/2015
• Published: 12/03/2015
• Est. Priority Date: 05/30/2014
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: MIYASAKA, Fumito
• Granted Patent: US 9,368,940 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01S 5/02257 using windows, e.g. specially adapted for back-reflecting light to a detector inside the housing
• CPC Class Codes: H01S 5/106 varying thickness along the optical axis
• CPC Class Codes: H01S 5/164 with window regions comprising semiconductor material with a wider bandgap than the active layer
• CPC Class Codes: H01S 5/221 containing aluminium
• CPC Class Codes: H01S 5/2272 grown by a mask induced selective growth
• CPC Class Codes: H01S 5/320275 semi-polar orientation
• CPC Class Codes: H01S 5/32341 blue laser based on GaN or GaP
• CPC Class Codes: H01S 5/34 comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers H01S5/36 takes precedence
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser
• CPC Class Codes: H01S 5/34346 characterised by the materials of the barrier layers

Abstract

To provide a semiconductor laser that suppresses end face destruction due to catastrophic optical damage (COD) to a light emission end face and has high output characteristics.

An n-type clad layer, a current block layer, an active layer, and a p-type clad layer are provided over an n-type substrate whose major plane has an off-angle in a <1-100>direction from a (0001) plane. For example, the current block layer is arranged on both sides of a current constriction area. Then, the current block layer is arranged so as to be retracted from a cleavage plane (line). In this case, in the active layer having a quantum well structure that is crystal-grown over the n-type clad layer and the current block layer, the layer thickness of a window area from the cleavage plane (line) up to the end part of the current block layer is smaller than the layer thickness of the current constriction area (area between the current block layers). As a result, the band gap of the active layer in the window area becomes large, and thus it is possible to suppress end face destruction due to the COD.

Claims

1. A semiconductor device comprising:

a substrate;

a first nitride semiconductor layer arranged over a major plane of the substrate;

a second nitride semiconductor layer arranged over the first nitride semiconductor layer;

a third nitride semiconductor layer arranged over the second nitride semiconductor layer;

a fourth nitride semiconductor layer arranged between the first nitride semiconductor layer and the second nitride semiconductor layer; and

a side face at which the second nitride semiconductor layer is exposed,

wherein the side face extends in a first direction,

wherein the fourth nitride semiconductor layer is arranged being retracted from the side face, in second areas on both sides of a first area extending in a second direction that intersects the first direction,

wherein a band gap of the first nitride semiconductor layer, which is a first conductive type, is larger than that of the second nitride semiconductor layer,

wherein a band gap of the third nitride semiconductor layer, which is a second conductive type that is a opposite conductive type of the first conductive type, is larger than that of the second nitride semiconductor layer;

wherein a band gap of the fourth nitride semiconductor layer, which contains Al, is larger than that of the third nitride semiconductor layer;

wherein the major plane of the substrate has an off-angle in a <

1-100>

direction from a (0001) plane, and

wherein a layer thickness of a third area from the side face of the second nitride semiconductor layer up to an end part of the fourth nitride semiconductor layer is smaller than a layer thickness of the first area.

2. The semiconductor device according to claim 1, further comprising a fifth nitride semiconductor layer arranged between the second nitride semiconductor layer and the fourth nitride semiconductor layer,

wherein the second nitride semiconductor layer is arranged over the fifth nitride semiconductor layer.

3. The semiconductor device according to claim 2,

wherein a layer thickness of the third area of the fifth nitride semiconductor layer is smaller than a layer thickness of the first area.

4. The semiconductor device according to claim 1, further comprising a sixth nitride semiconductor layer arranged between the second nitride semiconductor layer and the third nitride semiconductor layer,

wherein the sixth nitride semiconductor layer is arranged over the second nitride semiconductor layer.

5. The semiconductor device according to claim 1,

wherein the second direction is the <

1-100>

direction.

6. The semiconductor device according to claim 5,

wherein the planar shape of the fourth nitride semiconductor layer is the shape of a quadrangle having its long side in the <

1-100>

direction.

7. The semiconductor device according to claim 1,

wherein the fourth nitride semiconductor layer is an aluminum nitride layer or an aluminum gallium nitride layer.

8. The semiconductor device according to claim 7,

wherein the first nitride semiconductor layer is an aluminum gallium nitride layer obtained by introducing n-type impurities,

wherein the second nitride semiconductor layer is a stacked layer in which a first indium gallium nitride layer and a second indium gallium nitride layer having different indium compositions are alternately stacked, and

wherein the third nitride semiconductor layer has an aluminum gallium nitride layer obtained by introducing p-type impurities.

9. The semiconductor device according to claim 1,

wherein the third area is arranged along an entire area of the side face.

10. The semiconductor device according to claim 9,

wherein the fourth nitride semiconductor layer extends to an end part of the first nitride semiconductor layer, the end part extending in the second direction.

11. The semiconductor device according to claim 1,

wherein the third area is arranged along a part of the side face between the part of the side face and the first area, and

wherein a width in the first direction of the third area is greater than the width in the first direction of the first area.

12. The semiconductor device according to claim 1,

wherein the third nitride semiconductor layer extends to the side face in the form of a line in the <

1-100>

direction over the first area.

13. The semiconductor device according to claim 12,

wherein a width in the first direction of the third nitride semiconductor layer in the form of a line is smaller than a width in the first direction of the first area.

14. A manufacturing method of a semiconductor device comprising the steps of:

(a) forming a first nitride semiconductor layer over a substrate whose major plane has an off-angle in a <

1-100>

direction from a (0001) plane;

(b) forming a second nitride semiconductor layer over the first nitride semiconductor layer;

(c) causing the second nitride semiconductor layer to remain, so as to be arranged being retracted from a side face line, in second areas on both sides of a first area extending in a second direction that intersects the side face line extending in a first direction of the first nitride semiconductor layer by etching the second nitride semiconductor layer; and

(d) forming a third nitride semiconductor layer over the first nitride semiconductor layer and the second nitride semiconductor layer.

15. The manufacturing method of a semiconductor device according to claim 14,

wherein the (d) step is a step of crystal-growing the third nitride semiconductor layer, in which the third nitride semiconductor layer is formed so that a layer thickness of a third area from the side face line up to an end part of the second nitride semiconductor layer is smaller than a layer thickness of the first area.

16. The manufacturing method of a semiconductor device according to claim 15, further comprising a step of (e), after the (d) step, forming a fourth nitride semiconductor layer over the third nitride semiconductor layer.

17. The manufacturing method of a semiconductor device according to claim 16, further comprising a step of (f), after the (e) step, causing the fourth nitride semiconductor layer in the form of a line to remain over the first area by etching the fourth nitride semiconductor layer.

18. The manufacturing method of a semiconductor device according to claim 16,

wherein a width in the first direction of the fourth nitride semiconductor layer in the form of a line is less than a width in the first direction of the first area.

19. The manufacturing method of a semiconductor device according to claim 14,

wherein a planar shape of the second nitride semiconductor layer is a shape of a quadrangle having its long side in the <

1-100>

direction.

20. The manufacturing method of a semiconductor device according to claim 14,

wherein the fourth nitride semiconductor layer is an aluminum nitride layer or an aluminum gallium nitride layer.