MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

• US 20150357368A1
• Filed: 06/03/2015
• Published: 12/10/2015
• Est. Priority Date: 06/05/2014
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Kimura, Masatoshi
• Granted Patent: US 9,515,117 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14605 Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

The performance of a solid state image sensor which is formed by performing divided exposure that exposes the entire chip by a plurality of times of exposure and in which each of a plurality of pixels arranged in a pixel array portion has a plurality of photodiodes is improved.

In the divided exposure performed when the solid state image sensor is manufactured, a dividing line that divides an exposure region is defined to be located between a first photodiode and a second photodiode aligned in a first direction in an active region in a pixel and is defined to be along a second direction perpendicular to the first direction.

Claims

1. A manufacturing method of a semiconductor device including a solid state image sensor having a plurality of pixels containing a first photodiode and a second photodiode, the manufacturing method comprising the steps of:

(a) preparing a substrate including a first region and a second region adjacent to each other in an upper surface of the substrate;

(b) forming a photoresist film over the substrate;

(c) exposing the photoresist film in the first region;

(d) exposing the photoresist film in the second region;

(e) after the step (c) and the step (d), patterning the photoresist film by developing the photoresist film;

(f) forming an element isolation structure, which partitions an active region in the pixels in the substrate, over the substrate by using the photoresist film patterned in the step (e); and

(g) after the step (f), forming the first photodiode in the first region and forming the second photodiode in the second region by introducing impurities into the upper surface of the substrate in the active region,

wherein the first photodiode and the second photodiode are separated from each other with a boundary between the first region and the second region in between.

2. The manufacturing method of a semiconductor device according to claim 1,

wherein in the active region, a portion formed in the first region and a portion formed in the second region are formed to be shifted from each other in one direction in plan view.

3. The manufacturing method of a semiconductor device according to claim 2,

wherein a level difference occurs in a layout of a periphery of the active region in plan view at the boundary between the first region and the second region.

4. The manufacturing method of a semiconductor device according to claim 1,

wherein the boundary extends in a first direction along a main surface of the substrate,

a plurality of the pixels are arranged in a second direction which is perpendicular to the first direction and which is along the main surface of the substrate, and

a distance between the first photodiode and the second photodiode in the pixel that overlaps with the boundary in plan view is greater than a distance between the first photodiode and the second photodiode in the pixel that does not overlap with the boundary in plan view.

5. The manufacturing method of a semiconductor device according to claim 4,

wherein a width of the first photodiode in the second direction in the pixel that overlaps with the boundary in plan view is smaller than a width of the first photodiode in the second direction in the pixel that does not overlap with the boundary in plan view.

6. The manufacturing method of a semiconductor device according to claim 5,

wherein a width of the second photodiode in the second direction in the pixel that overlaps with the boundary in plan view is smaller than a width of the second photodiode in the second direction in the pixel that does not overlap with the boundary in plan view.

7. A manufacturing method of a semiconductor device including a solid state image sensor having a plurality of pixels containing a first photodiode and a second photodiode, the manufacturing method comprising the steps of:

(a) preparing a substrate including a first region and a second region adjacent to each other in an upper surface of the substrate;

(b) forming a photoresist film over the substrate;

(c) exposing the photoresist film in the first region;

(d) exposing the photoresist film in the second region;

(e) after the step (c) and the step (d), patterning the photoresist film by developing the photoresist film;

(f) forming an element isolation structure, which partitions an active region in the pixels in the substrate, over the substrate by using the photoresist film patterned in the step (e); and

(g) after the step (f), forming the first photodiode and the second photodiode aligned along a main surface of the substrate by introducing impurities into the upper surface of the substrate in the active region,

wherein a dividing line between the first region and the second region overlaps with the first photodiode and extends in a longitudinal direction of the first photodiode in plan view.

8. The manufacturing method of a semiconductor device according to claim 7,

wherein, in the active region, a portion formed in the first region and a portion formed in the second region are formed to be shifted from each other in one direction in plan view, and

a level difference occurs in a layout of a periphery of the active region in plan view at a boundary between the first region and the second region.

9. A semiconductor device including a solid state image sensor, the semiconductor device comprising:

a substrate including a first region and a second region adjacent to each other in an upper surface of the substrate;

a pixel including an active region partitioned by an element isolation structure in the upper surface of the substrate;

a first photodiode formed in the first region in the active region; and

a second photodiode formed separately from the first photodiode in the second region in the active region,

wherein, in the active region, a portion formed in the first region and a portion formed in the second region are formed to be shifted from each other in one direction in plan view, and

a level difference is formed in a layout of a periphery of the active region in plan view at a boundary between the first region and the second region.

10. The semiconductor device according to claim 9,

wherein the boundary extends in a first direction along a main surface of the substrate,

a plurality of the pixels are arranged in a second direction which is perpendicular to the first direction and which is along the main surface of the substrate, and

a distance between the first photodiode and the second photodiode in the pixel that overlaps with the boundary in plan view is greater than a distance between the first photodiode and the second photodiode in the pixel that does not overlap with the boundary in plan view.

11. The semiconductor device according to claim 10,

wherein a width of the first photodiode in the second direction in the pixel that overlaps with the boundary in plan view is smaller than a width of the first photodiode in the second direction in the pixel that does not overlap with the boundary in plan view.

12. The semiconductor device according to claim 11,

wherein a width of the second photodiode in the second direction in the pixel that overlaps with the boundary in plan view is smaller than a width of the second photodiode in the second direction in the pixel that does not overlap with the boundary in plan view.

13. The semiconductor device according to claim 9,

wherein a peripheral transistor that amplifies and outputs an electrical charge generated in the first photodiode and the second photodiode is provided in the pixel.