SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
First Claim
1. A semiconductor device, comprising:
- a substrate;
an active layer disposed on the substrate;
a source electrode and a drain electrode disposed on or above the active layer;
a p-type doped layer disposed on the active layer and between the source electrode and the drain electrode, wherein the p-type doped layer has a first thickness;
a gate electrode disposed on the p-type doped layer;
a first passivation layer covering at least the gate electrode and the active layer; and
a field plate disposed on or above the first passivation layer and electrically connected to the source electrode, wherein the field plate comprises a field dispersion portion disposed between the gate electrode and the drain electrode, and the first passivation layer has a second thickness between the field dispersion portion and the active layer;
wherein the second thickness is smaller than the first thickness.
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Accused Products
Abstract
A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a p-type doped layer, a gate electrode, a passivation layer, and a field plate. The active layer is disposed on the substrate. The source electrode, the drain electrode and the p-type doped layer are disposed on the active layer. The p-type doped layer is disposed between the source electrode and the drain electrode, and has a first thickness. The gate electrode is disposed on the p-type doped layer. The passivation layer covers the gate electrode and the active layer. The field plate is disposed on the passivation layer and is electrically connected to the source electrode. The field plate includes a field dispersion portion disposed between the gate electrode and the drain electrode. The passivation layer between the field dispersion portion and the active layer has a second thickness smaller than the first thickness.
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Citations
17 Claims
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1. A semiconductor device, comprising:
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a substrate; an active layer disposed on the substrate; a source electrode and a drain electrode disposed on or above the active layer; a p-type doped layer disposed on the active layer and between the source electrode and the drain electrode, wherein the p-type doped layer has a first thickness; a gate electrode disposed on the p-type doped layer; a first passivation layer covering at least the gate electrode and the active layer; and a field plate disposed on or above the first passivation layer and electrically connected to the source electrode, wherein the field plate comprises a field dispersion portion disposed between the gate electrode and the drain electrode, and the first passivation layer has a second thickness between the field dispersion portion and the active layer; wherein the second thickness is smaller than the first thickness. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for manufacturing a semiconductor device, comprising:
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providing a substrate; forming an active layer on the substrate; forming a p-type doped layer on the active layer, wherein the p-type doped layer has a first thickness; forming a gate electrode on the p-type doped layer; forming a passivation layer to cover the gate electrode and the active layer; forming a source via hole, a drain via hole, and a blind hole in the passivation layer, wherein the p-type doped layer is disposed between the source via hole and the blind hole, the blind hole is disposed between the p-type doped layer and the drain via hole, a portion of the passivation layer under the blind hole has a second thickness smaller than the first thickness; and respectively forming a source electrode, a field plate and a drain electrode in the source via hole, the blind hole, and the drain via hole. - View Dependent Claims (12, 13)
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14. A method for manufacturing a semiconductor device, comprising:
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providing a substrate; forming an active layer on the substrate; forming a p-type doped layer on the active layer, wherein the p-type doped layer has a first thickness; forming a gate electrode on the p-type doped layer; forming a first passivation layer to cover the gate electrode and the active layer; forming a field dispersion portion of a field plate on the first passivation layer, wherein a portion of the first passivation layer between the field dispersion portion and the active layer has a second thickness smaller than the first thickness; forming a second passivation layer to cover the field dispersion portion and the first passivation layer; forming a source via hole and a drain via hole in the second passivation layer and forming a source via hole and a drain via hole in the first passivation layer, the source via hole of the first passivation layer and the source via hole of the second passivation layer together exposing a portion of the active layer, and the drain via hole of the first passivation layer and the drain via hole of the second passivation layer together exposing another portion of the active layer, wherein the p-type doped layer is disposed between the source via holes and the field dispersion portion, the field dispersion portion is disposed between the p-type doped layer and the drain via holes; forming a source electrode in the source via holes; forming a drain electrode in the drain via holes; forming an extending portion of the field plate on the second passivation layer to be electrically connected to the source electrode; and forming a conductive element of the field plate to electrically connect the field dispersion portion to the extending portion. - View Dependent Claims (15, 16, 17)
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Specification