WAFER LEVEL PACKAGING OF REDUCED-HEIGHT INFRARED DETECTORS

• US 20150358558A1
• Filed: 06/02/2015
• Published: 12/10/2015
• Est. Priority Date: 06/04/2014
• Status: Active Grant

• Current Assignee: Teledyne FLIR LLC (Teledyne Technologies Incorporated)
• Original Assignee: FLIR Systems, Inc. (Teledyne Technologies Incorporated)
• Inventors: Bornfreund, Richard E., McKenzie, Tiahaar Kurtheru Clayton, Leonard, Devin, Carlson, Gregory A.
• Granted Patent: US 10,153,204 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/67092 Apparatus for mechanical treatment or grinding or cutting, see the relevant groups in subclasses B24B or B28D
• CPC Class Codes: H01L 21/681 using optical controlling means
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14649 Infrared imagers
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: Y10T 83/533 With photo-electric work-sensing means

Abstract

Systems and methods may be provided for generating reduced-height circuit packages such as infrared detector packages. An alignment and dicing system may include an infrared camera that captures images of alignment marks of a wafer assembly through a lid wafer of the wafer assembly, a light source that illuminates the alignment marks through the lid wafer, and dicing equipment that dices the wafer assembly based on infrared images captured using the infrared camera. The light source may illuminate the alignment marks through the lid wafer by providing light such as infrared light to the wafer assembly through optics of the infrared camera. The infrared camera may capture images of alignment marks formed on a detector wafer of the wafer assembly or on an interior or lower surface of the lid wafer through the lid wafer. The dicing equipment may be aligned with the wafer assembly based on the captured images.

Claims

1. A method, comprising:

thinning a first wafer that is attached to a second wafer;

capturing an infrared image, through at least a portion of the thinned first wafer, of an alignment mark on and/or within the first wafer and/or on and/or within the second wafer; and

performing wafer level processing operations based on the capturing.

2. The method of claim 1, further comprising providing a wafer assembly having the first wafer attached to the second wafer, wherein the first wafer is transparent to infrared light.

3. The method of claim 2, wherein the performing comprises:

aligning dicing equipment with dicing lanes of the wafer assembly based on the capturing; and

slicing through the first wafer along the dicing lanes with the dicing equipment based on the aligning.

4. The method of claim 3, wherein the wafer assembly comprises an infrared detector wafer assembly, wherein the first wafer comprises a lid wafer of the infrared detector wafer assembly and wherein the second wafer comprises a detector wafer of the infrared detector wafer assembly.

5. The method of claim 4, wherein the lid wafer includes an array of cavities in an interior surface of the lid wafer, wherein adjacent rows and columns of the array are separated from each other by the dicing lanes, and wherein the detector wafer comprises:

an upper surface with an array of infrared detector arrays corresponding in size and location to a corresponding one of the cavities in the lid wafer; and

a corresponding array of readout integrated circuits respectively interconnected with associated ones of the infrared detector arrays disposed thereon, wherein adjacent rows and columns of the array of the infrared detector arrays are separated from each other by the dicing lanes.

6. The method of claim 4, further comprising performing a wafer level electrical test using test pads on the detector wafer exposed by the slicing.

7. The method of claim 6, further comprising slicing through the detector wafer along the dicing lanes.

8. The method of claim 7, further comprising assembling, into a camera, an infrared detector formed by the slicing through the detector wafer.

9. The method of claim 1, further comprising illuminating the alignment mark through the portion of the first wafer.

10. The method of claim 9, wherein the capturing comprises capturing the infared image using an infrared camera and wherein the illuminating comprises providing infrared light from a light source through an optical element of the infrared camera.

11. An infrared detector, comprising:

a substrate having an array of infrared detector elements and a readout integrated circuit interconnected with the array and disposed on an upper surface thereof;

a lid located above the array, the lid being substantially transparent to infrared light;

a closed cavity that encloses the array between the lid and the substrate; and

at least one alignment mark formed within the lid, on an interior surface of the lid, on the upper surface of the substrate, and/or within the substrate.

12. The infrared detector of claim 11, wherein the lid comprises a diced portion of a thinned semiconductor wafer.

13. The infrared detector of claim 12, further comprising an antireflective coating on the lid.

14. A camera comprising the infrared detector of claim 11.

15. An electronic device comprising the infrared detector of claim 11.

16. A system, comprising:

an infrared camera configured to capture infrared images, through a lid wafer of a wafer assembly, of alignment marks on and/or within the wafer assembly;

dicing equipment; and

processing and control equipment configured to receive the infrared images from the infrared camera and to operate the dicing equipment to slice through the lid wafer along dicing lanes of the wafer assembly based on the received infrared images.

17. The system of claim 16, wherein the infrared camera is a short wave infrared camera, the system further comprising a light source coupled to optics of the infrared camera that illuminates the wafer assembly through the optics of the infrared camera.

18. The system of claim 17, wherein the optics comprise a microscope on the infrared camera.

19. The system of claim 18, wherein the processing and control equipment comprises a machine vision system.

20. The system of claim 19, wherein the machine vision system is configured to operate the dicing equipment to slice through a detector wafer of the wafer assembly along the dicing lanes of the wafer assembly based on the infrared images following a wafer level electrical test of the wafer assembly using test pads on the detector wafer exposed by the slice through the lid wafer.