IMPLEMENTING ENHANCED WEAR LEVELING IN 3D FLASH MEMORIES

• US 20150370669A1
• Filed: 02/20/2015
• Published: 12/24/2015
• Est. Priority Date: 06/18/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Tressler, Gary A., Vidyapoornachary, Diyanesh Babu C.
• Granted Patent: US 9,489,276 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1658 Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/20 using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
• CPC Class Codes: G06F 11/2094 Redundant storage or storage space G06F11/2056 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
• CPC Class Codes: G11C 29/70 Masking faults in memories by using spares or by reconfiguring

Abstract

A method, system and computer program product are provided for implementing enhanced wear leveling in a stack of flash memory chips. A flash memory includes plurality of flash memory chips including a number N data chips and one or more spare chips. To even wear among the plurality of flash memory chips, a memory controller for the flash memory periodically transfers data from a data chip to a current spare chip, the current spare chip becomes a data chip and the selected data chip becomes the current spare chip. Over time, each chip in the stack becomes the spare chip. If a chip becomes nonfunctional, whatever chip is currently the spare chip becomes a permanent data chip and no more rotating is done.

Claims

1. A method for implementing enhanced wear leveling in a stack of flash memory chips comprising:

providing the stack of the flash memory chips with a number N of active data chips and one or more spare chips;

periodically transferring data from an active data chip to a current spare chip, the current spare chip becoming a data chip and the active data chip becoming the current spare chip;

continuing the periodic data transfer from an active data chip to a current spare chip with each of the flash memory chips becoming the spare chip over a time interval to even wear among all the flash memory chips; and

responsive to a chip failure, the current spare chip becoming a permanent data chip ending the periodic data transfer.

2. The method as recited in claim 1 includes providing a memory controller for monitoring the plurality of flash memory chips to identify block usage of a predetermined wear leveling (WL) threshold.

3. The method as recited in claim 1 includes storing a predetermined wear leveling (WL) threshold value.

4. The method as recited in claim 3 wherein the predetermined wear leveling (WL) threshold value is a user selected programmable value.

5. The method as recited in claim 1 includes identifying a wear leveling (WL) threshold value for a particular active data chip adjacent to the current spare chip, and migrating data from the active data chip to the current spare chip.

6. The method as recited in claim 5 includes marking the active data chip as the current spare chip.

7. The method as recited in claim 1 includes moving the spare chip location through all positions in the chip stack, ensuring uniform wear leveling.

8. The method as recited in claim 1 includes providing a memory controller for monitoring the plurality of flash memory chips to identify a chip failure.

9. The method as recited in claim 8 includes using the current spare chip in place of the failed data chip, and ending the periodic data transfer.

10-20. -20. (canceled)