Semiconductor Memory Having Both Volatile and Non-Volatile Functionality and Method of Operating
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Abstract
Semiconductor memory having both volatile and non-volatile modes and methods of operation. A semiconductor storage device includes a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory. The device includes a floating gate or trapping layer for storing data as non-volatile memory, the device operating as volatile memory when power is applied to the device, and the device storing data from the volatile memory as non-volatile memory when power to the device is interrupted.
146 Citations
38 Claims
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1-22. -22. (canceled)
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23. A method of operating a semiconductor memory cell having a fin structure comprising:
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a floating body region configured to be charged to a level indicative of a state of the memory cell to store the state as volatile memory; and a floating gate or trapping layer insulated from said floating body region; the method comprising transferring said volatile memory state to the floating gate or trapping layer when power to the cell is interrupted; wherein electron injection into said floating gate or trapping layer occurs when said volatile memory is in a first state, and wherein no electron injection into said floating gate or trapping layer occurs when said memory cell is in a second state. - View Dependent Claims (24, 25, 26, 27)
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28. A method of operating a semiconductor memory cell having a fin structure comprising:
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a floating body region configured to be charged to a level indicative of a state of the memory cell to store the state as volatile memory; and a floating gate or trapping layer insulated from said floating body region; the method comprising; restoring power to said memory cell; and charging said floating body region based on charge stored in said floating gate or trapping layer upon restoration of power to said memory cell. - View Dependent Claims (29, 30, 31, 32, 33)
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34. A method of operating a semiconductor memory cell having a fin structure, said method comprising:
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providing the memory cell to have a floating body for storing data as volatile memory and a floating gate or trapping layer for storing data as non-volatile memory; and transferring a state of said non-volatile memory to said volatile memory based on said state of said non-volatile memory state when power is restored to the memory cell. - View Dependent Claims (35, 36, 37, 38)
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Specification