Method of Reducing an Impurity Concentration in a Semiconductor Body, Method of Manufacturing a Semiconductor Device and Semiconductor Device

• US 20150371871A1
• Filed: 06/19/2014
• Published: 12/24/2015
• Est. Priority Date: 06/19/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Schulze, Hans-Joachim
• Granted Patent: US 9,425,063 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/263 with high-energy radiation H01L21/261 takes precedence
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/3221 of silicon bodies, e.g. for gettering
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/66136 PN junction diodes
• CPC Class Codes: H01L 29/6634 with a recess formed by etching in the source/emitter contact region H01L29/66348 takes precedence; etching of semiconductor bodies H01L21/302
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7396 with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/861 Diodes

Abstract

A method of reducing an impurity concentration in a semiconductor body includes irradiating the semiconductor body with particles through a first side of the semiconductor body. The method further includes removing at least a part of impurities from an irradiated part of the semiconductor body by out-diffusion during thermal treatment in a temperature range between 450° C. to 1200° C.

Claims

1. A method of reducing an impurity concentration in a semiconductor body, the method comprising:

irradiating the semiconductor body with particles through a first side of the semiconductor body; and

removing at least a part of impurities from an irradiated part of the semiconductor body by out-diffusion during thermal treatment in a temperature range between 450°

C. to 1200°

C.

2. The method of claim 1, wherein the semiconductor body is a magnetic Czochralski silicon body.

3. The method of claim 1, wherein the impurities include nitrogen.

4. The method of claim 3, wherein the thermal treatment is in the temperature range between 700°

C. to 1200°

C.

5. The method of claim 1, wherein the impurities include carbon.

6. The method of claim 5, wherein the thermal treatment is in the temperature range between 650°

C. to 900°

C.

7. The method of claim 1, wherein the particles include at least one of protons and helium ions.

8. The method of claim 1, wherein the thermal treatment is carried out for a duration between 10 seconds to twenty hours.

9. A method of manufacturing a semiconductor device, the method comprising:

irradiating the semiconductor body with particles through a first side of the semiconductor body;

removing at least a part of impurities from an irradiated part of the semiconductor body by out-diffusion during thermal treatment in a temperature range between 450°

C. to 1200°

C.; and

forming a first load terminal structure at the first side of the semiconductor body.

10. The method of claim of claim 9, wherein the semiconductor device is a vertical semiconductor device, the method further comprising:

forming a second load terminal structure at a second side of the semiconductor body opposite to the first side.

11. The method of claim 9, wherein the vertical semiconductor device is a semiconductor diode, the method further comprising:

forming an anode region in the semiconductor body by introducing p-type dopants through the first side into the semiconductor body; and

forming a cathode region in the semiconductor body by introducing n-type dopants through a second side of the semiconductor body into the semiconductor body, the second side being opposite the first side.

12. The method of claim 9, wherein the vertical semiconductor device is one of an insulated gate field effect transistor and an insulated gate bipolar transistor, the method further comprising:

forming a control terminal structure at the first side by forming a gate dielectric structure and a gate electrode structure at the first side;

forming one of a source and an emitter at the first side by introducing dopants through the first side; and

forming one of a drain and a collector at a second side of the semiconductor body opposite to the first side by introducing dopants through the second side.

13. The method of claim of claim 9, wherein the semiconductor device is a lateral semiconductor device, the method further comprising:

forming a second load terminal structure at the first side of the semiconductor body.

14. The method of claim 9, wherein the impurities include at least one of nitrogen and carbon.

15. A semiconductor device, comprising:

a silicon body having opposite first and second sides, a first part of the silicon body adjoining the first side and a second part of the silicon body being disposed between the first part and the second side,

wherein an average concentration of one of nitrogen and carbon in the first part is less than 60% of an average concentration of the one of nitrogen and carbon in the second part.

16. The semiconductor device of claim 15, wherein the silicon body is a magnetic Czochralski silicon body.

17. The semiconductor device of claim 15, further comprising a third part of the silicon body between the second side and the second part, wherein the average concentration of the one of nitrogen and carbon in the third part is less than 60% of the average concentration of the one of nitrogen and carbon in the second part.

18. The semiconductor device of claim 15, wherein the average concentration of the one of nitrogen and carbon in the second part differs by less than 10% along a vertical direction between the first and second sides.

19. The semiconductor device of claim 15, wherein a vertical distance between the first side and the second part ranges between 10 μ

m and 200 μ

m.

20. The semiconductor device of claim 15, wherein the semiconductor device is a vertical power semiconductor device comprising a first load terminal structure at the first side and a second load terminal structure at the second side.

21. The semiconductor device of claim 15, further comprising a transition region between the first and second parts, wherein a ratio of an average gradient α

₂ of the concentration of the one of nitrogen and carbon in the transition region and an average gradient α

₁ of the concentration of the one of nitrogen and carbon in the first part is greater than 3.

22. The semiconductor device of claim 15, further comprising a transition region between the first and second parts, wherein a thickness t₂ of the transition region ranges between 1% to 30% of a thickness t₁ of the first part.