Gate Structure and Method for Fabricating the Same

• US 20150372149A1
• Filed: 06/20/2014
• Published: 12/24/2015
• Est. Priority Date: 06/20/2014
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Colinge, Jean-Pierre, Guo, Ta-Pen, Diaz, Carlos H.
• Granted Patent: US 9,614,091 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 29/0676 oriented perpendicular or at an angle to a substrate
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/42392 fully surrounding the channel, e.g. gate-all-around
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/78642 Vertical transistors
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 29/788 with floating gate H01L29/78391 takes precedence
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H01L 29/7889 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane

Abstract

An apparatus comprises a nanowire having a channel region, a gate structure surrounding a lower portion of the channel region, wherein the gate structure comprises a first dielectric layer comprising a vertical portion and a horizontal portion, a first workfunction metal layer over the first dielectric layer comprising a vertical portion and a horizontal portion and a low-resistivity metal layer over the first workfunction metal layer, wherein an edge of the low-resistivity metal layer and an edge of the vertical portion of the first workfunction metal layer are separated by a dielectric region and the low-resistivity metal layer is electrically coupled to the vertical portion of the first workfunction metal layer through the horizontal portion of the first workfunction metal layer.

Claims

1-7. -7. (canceled)

8. A device comprising:

a first nanowire over a substrate, wherein the nanowire comprises a first drain/source region over the substrate, a channel region over the first drain/source region and a second drain/source region over the channel region;

a first gate structure comprising;

a ring-shaped dielectric layer;

a first workfunction metal layer comprising a ring-shaped portion and a horizontal portion, wherein the ring-shaped dielectric layer is surrounded by the ring-shaped portion of the first workfunction metal layer; and

a gate metal layer over the horizontal portion of the first workfunction metal layer, wherein an edge of the gate metal layer and an edge of the ring-shaped portion of the first workfunction metal layer are separated by a dielectric region, and wherein the gate metal layer is electrically coupled to the ring-shaped portion of the first workfunction metal layer through the horizontal portion of the first workfunction metal layer.

9. The device of claim 8, further comprising:

a second nanowire over the substrate, wherein the second nanowire is of a same structure as the first nanowire; and

a second gate structure surrounding the second nanowire, wherein the second gate structure is of a same structure as the first gate structure, wherein a distance between the first nanowire and the second nanowire is at least two times greater than a thickness of the second gate structure.

10. The device of claim 9, further comprising:

a second workfunction metal layer over the first workfunction metal layer.

11. The device of claim 10, wherein:

the second workfunction metal layer is formed of TaN;

the first workfunction metal layer is formed of TiN; and

the gate metal layer is formed of copper.

13. The device of claim 8, further comprising:

an inter-layer dielectric layer over the substrate.

14. The device of claim 13, wherein:

the first nanowire is at least partially embedded in the inter-layer dielectric layer.

12. (canceled)

15-20. -20. (canceled)

21. A device comprising:

a first nanowire over a substrate, wherein the nanowire comprises a first drain/source region over the substrate, a channel region over the first drain/source region and a second drain/source region over the channel region;

a first gate structure comprising;

a ring-shaped dielectric layer;

a first workfunction metal layer comprising a ring-shaped portion and a horizontal portion, wherein the ring-shaped dielectric layer is surrounded by the ring-shaped portion of the first workfunction metal layer;

a gate metal layer over the horizontal portion of the first workfunction metal layer, wherein an edge of the gate metal layer and an edge of the ring-shaped portion of the first workfunction metal layer are separated by a dielectric region, and wherein the gate metal layer is electrically coupled to the ring-shaped portion of the first workfunction metal layer through the horizontal portion of the first workfunction metal layer;

a second nanowire over the substrate, wherein the second nanowire is of a same structure as the first nanowire; and

a second gate structure surrounding the second nanowire, wherein the second gate structure is of a same structure as the first gate structure.

22. The device of claim 21, wherein:

the first nanowire and the second nanowire are circular in shape from a top view.

23. The device of claim 21, wherein:

a distance between the first nanowire and the second nanowire is at least two times greater than a thickness of the second gate structure.

24. The device of claim 21, wherein:

a bottom surface of the ring-shaped dielectric layer is level with a top surface of the first drain/source region.

25. The device of claim 24, further comprising:

an inter-layer dielectric layer between the bottom surface of the ring-shaped dielectric layer and the substrate.

26. The device of claim 21, wherein:

the ring-shaped dielectric layer is formed of a high-k dielectric material.

27. The device of claim 21, wherein:

the first workfunction metal layer is formed of titanium nitride.

28. An apparatus comprising:

a first nanowire over a substrate, wherein the nanowire comprises a first drain/source region having a bottom surface in direct contact with the substrate, a channel region having a bottom surface in direct contact with the first drain/source region and a second drain/source region having a bottom surface in direct contact with the channel region;

a first gate structure comprising;

a ring-shaped dielectric layer surrounding a lower portion of the channel region;

a first workfunction metal layer comprising a ring-shaped portion and a horizontal portion, wherein the ring-shaped dielectric layer is surrounded by and in direct contact with the ring-shaped portion of the first workfunction metal layer; and

a gate metal layer over the horizontal portion of the first workfunction metal layer, wherein an edge of the gate metal layer and an edge of the ring-shaped portion of the first workfunction metal layer are separated by a dielectric region, and wherein the gate metal layer is electrically coupled to the ring-shaped portion of the first workfunction metal layer through the horizontal portion of the first workfunction metal layer.

29. The apparatus of claim 28, further comprising:

a second nanowire over the substrate, wherein the second nanowire is of a same structure as the first nanowire; and

a second gate structure surrounding the second nanowire, wherein the second gate structure is of a same structure as the first gate structure.

30. The apparatus of claim 29, wherein:

a distance between the first nanowire and the second nanowire is at least two times greater than a thickness of the second gate structure.

31. The apparatus of claim 28, further comprising:

a second workfunction metal layer comprising a ring-shaped portion and a horizontal portion, wherein the ring-shaped portion of the second workfunction metal layer is in direct contact with the ring-shaped portion of the first workfunction metal layer, and the horizontal portion of the second workfunction metal layer is in direct contact with the horizontal portion of the first workfunction metal layer.

32. The apparatus of claim 31, wherein:

the first workfunction metal layer is formed of titanium nitride; and

the second workfunction metal layer is formed of tantalum nitride.

33. The apparatus of claim 28, wherein:

the gate metal layer is formed of a low-resistivity metal.

34. The apparatus of claim 33, wherein:

the low-resistivity metal is copper.