CIRCUIT, A TIME-TO-DIGITAL CONVERTER, AN INTEGRATED CIRCUIT, A TRANSMITTER, A RECEIVER AND A TRANSCEIVER
First Claim
1. A circuit comprising:
- a controllable oscillator configured to generate an output signal based on a control signal;
an input signal processing circuit configured to receive a reference signal and generate a sequence of digital values indicating a phase relation between the reference signal and the output signal or a signal derived from the output signal; and
a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, wherein each processed value is based on a plurality of the digital values of the sequence of digital values, andwherein the control signal is based on the sequence of processed values.
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Accused Products
Abstract
A circuit according to an example includes a controllable oscillator configured to generate an output signal based on a control signal, an input signal processing circuit configured to receive a reference signal and configured to generate a sequence of digital values indicative of a phase relation between the reference signal and the output signal or a signal derived from the output signal, and a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, each processed value being based on a plurality of the digital values of the sequence of digital values, wherein the control signal is based on the sequence of processed values.
41 Citations
23 Claims
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1. A circuit comprising:
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a controllable oscillator configured to generate an output signal based on a control signal; an input signal processing circuit configured to receive a reference signal and generate a sequence of digital values indicating a phase relation between the reference signal and the output signal or a signal derived from the output signal; and a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, wherein each processed value is based on a plurality of the digital values of the sequence of digital values, and wherein the control signal is based on the sequence of processed values. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A time-to-digital converter comprising:
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an input signal processing circuit configured to receive at least one input signal and configured to generate a sequence of digital values indicative of time intervals concerning events comprised in the at least one input signal; and a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, wherein each processed value is based on a plurality of the digital values of the sequence of digital values.
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22. An integrated circuit comprising a circuit, the circuit comprising:
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a controllable oscillator configured to generate an output signal based on a control signal; an input signal processing circuit configured to receive a reference signal and to generate a sequence of digital values indicating a phase relation between the reference signal and the output signal or a signal derived from the output signal; and a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, wherein each processed value is based on a plurality of the digital values of the sequence of digital values, and wherein the control signal is based on the sequence of processed values.
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23. A method for generating an output signal depending on a reference signal, the method comprising:
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generating the output signal based on a control signal; receiving the reference signal and generating a sequence of digital values indicating a phase relation between the reference signal and the output signal or a signal derived from the output signal; and generating a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, wherein each processed value being is on a plurality of the digital values of the sequence of digital values, and wherein the control signal is based on the processed values.
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Specification