ADJUSTING A DISPERSAL PARAMETER OF DISPERSEDLY STORED DATA

• US 20150373120A1
• Filed: 09/01/2015
• Published: 12/24/2015
• Est. Priority Date: 04/01/2011
• Status: Active Grant

• Current Assignee: Pure Storage, Inc.
• Original Assignee: Cleversafe Incorporated (International Business Machines Corporation)
• Inventors: Resch, Jason K., Grube, Gary W., Markison, Timothy W.
• Granted Patent: US 9,501,358 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1044 with specific ECC/EDC distribution
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/3006 where the computing system is distributed, e.g. networked systems, clusters, multiprocessor systems multiprogramming arrangements G06F9/46; allocation of resources G06F9/50
• CPC Class Codes: G06F 11/3051 Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs verification or detection of system hardware configuration G06F11/2247
• CPC Class Codes: G06F 11/3055 Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available error or fault processing without redundancy G06F11/0703; error detection or correction by redundancy in data representation G06F11/08; error detection or correction by redundancy in operation G06F11/14; error detection or correction by redundancy in hardware G06F11/16
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0646 Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/23 using convolutional codes, e.g. unit memory codes
• CPC Class Codes: H03M 13/2707 Simple row-column interleaver, i.e. pure block interleaving
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]

Abstract

A method includes storing a first subset of encoded data slices of a set of encoded data slices in one local memory, LAN memory, and/or WAN memory. The method further includes storing a second subset of encoded data slices in a different one of the local memory, the LAN memory, and the WAN memory. The method further includes determining to make a change in storage of the set of encoded data slices. The method further includes determining to make an adjustment to the pillar width number based on the determined storage change. The method further includes generating adjusted encoded data slices for the set of encoded data slices based on the adjustment to the pillar width number. The method further includes storing the updated set of encoded data slices in accordance with the determined change in the storage of the set of encoded data slices.

Claims

1. A method for execution by a computing device, the method comprises:

storing a first subset of encoded data slices of a set of encoded data slices in one of local memory of the computing device, local area network (LAN) memory affiliated with the computing device, and wide area network (WAN) memory affiliated with the computing device, wherein a data segment of a data object is encoded using a dispersed storage error coding function to produce the set of encoded data slices, wherein a decode threshold number of encoded data slices of the set of encoded data slices is needed to recover the data segment and wherein the dispersed storage error coding function includes a pillar width number, which corresponds to a number of encoded data slices in the set of encoded data slices, and the decode threshold number;

storing a second subset of encoded data slices of a set of encoded data slices in a different one of the local memory, the LAN memory, and the WAN memory;

determining to make a change in storage of the set of encoded data slices;

determining to make an adjustment to the pillar width number based on the determined change in the storage of the set of encoded data slices;

generating adjusted encoded data slices for the set of encoded data slices based on the adjustment to the pillar width number to produce an updated set of encoded data slices; and

storing the updated set of encoded data slices in accordance with the determined change in the storage of the set of encoded data slices.

2. The method of claim 1 further comprises:

the first subset of encoded data slices being equal to the decode threshold number of encoded data slices.

3. The method of claim 1 further comprises:

the first subset of encoded data slices being stored in the local memory of the LAN;

determining to change the storage of the first subset of encoded data slices from the local memory or the LAN memory to the WAN memory;

increasing the pillar width number to increase the number of encoded data slices in the set of encoded data slices; and

storing at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the WAN memory.

4. The method of claim 1 further comprises:

the first subset of encoded data slices being stored in the WAN memory;

determining to change the storage of the first subset of encoded data slices from the WAN memory to the local memory or the LAN memory;

decreasing the pillar width number to decrease the number of encoded data slices in the set of encoded data slices; and

storing at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the local memory or the LAN memory.

5. The method of claim 1 further comprises:

storing a third subset of encoded data slices of a set of encoded data slices in a second different one of the local memory, the LAN memory, and the WAN memory.

6. The method of claim 1, wherein the determining to make the adjustment to the pillar width number further comprises:

determining performance of a distributed storage network (DSN) in which the computing device, the LAN memory, and the WAN memory are affiliated; and

determining a level of adjustment based on the performance of the DSN.

7. A computing device comprises:

interface operable to connect to one or more of local area network (LAN) memory and wide area network (WAN) memory;

local memory; and

processing module operable to;

enable storage of a first subset of encoded data slices of a set of encoded data slices in one of the local memory, the LAN memory, and the WAN memory, wherein a data segment of a data object is encoded using a dispersed storage error coding function to produce the set of encoded data slices, wherein a decode threshold number of encoded data slices of the set of encoded data slices is needed to recover the data segment and wherein the dispersed storage error coding function includes a pillar width number, which corresponds to a number of encoded data slices in the set of encoded data slices, and the decode threshold number;

enable storage of a second subset of encoded data slices of a set of encoded data slices in a different one of the local memory, the LAN memory, and the WAN memory;

determine to make a change in storage of the set of encoded data slices;

determine to make an adjustment to the pillar width number based on the determined change in the storage of the set of encoded data slices;

generate adjusted encoded data slices for the set of encoded data slices based on the adjustment to the pillar width number to produce an updated set of encoded data slices; and

enable storage of the updated set of encoded data slices in accordance with the determined change in the storage of the set of encoded data slices.

8. The computing device of claim 7, wherein the first subset of encoded data slices comprises:

a number of encoded data slices equaling the decode threshold number.

9. The computing device of claim 7, wherein the processing module further functions to:

cause the first subset of encoded data slices to be stored in the local memory of the LAN;

determine to change the storage of the first subset of encoded data slices from the local memory or the LAN memory to the WAN memory;

increase the pillar width number to increase the number of encoded data slices in the set of encoded data slices; and

cause storage of at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the WAN memory.

10. The computing device of claim 7, wherein the processing module further functions to:

cause the first subset of encoded data slices to be stored in the WAN memory;

determine to change the storage of the first subset of encoded data slices from the WAN memory to the local memory or the LAN memory;

decrease the pillar width number to decrease the number of encoded data slices in the set of encoded data slices; and

cause storage of at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the local memory or the LAN memory.

11. The computing device of claim 7, wherein the processing module further functions to:

cause storage a third subset of encoded data slices of a set of encoded data slices in a second different one of the local memory, the LAN memory, and the WAN memory.

12. The computing device of claim 7, wherein the processing module further functions to determine to make the adjustment to the pillar width number further by:

determining performance of a distributed storage network (DSN) in which the computing device, the LAN memory, and the WAN memory are affiliated; and

determining a level of adjustment based on the performance of the DSN.

13. A non-transitory computer readable storage device comprises:

a first memory section that stores operational instructions that, when executed by a computing device, causes the computing device to;

enable storage of a first subset of encoded data slices of a set of encoded data slices in one of local memory of the computing device, local area network (LAN) memory affiliated with the computing device, and wide area network (WAN) memory affiliated with the computing device, wherein a data segment of a data object is encoded using a dispersed storage error coding function to produce the set of encoded data slices, wherein a decode threshold number of encoded data slices of the set of encoded data slices is needed to recover the data segment and wherein the dispersed storage error coding function includes a pillar width number, which corresponds to a number of encoded data slices in the set of encoded data slices, and the decode threshold number; and

enable storage of a second subset of encoded data slices of a set of encoded data slices in a different one of the local memory, the LAN memory, and the WAN memory;

a second memory section that stores operational instructions that, when executed by the computing device, causes the computing device to;

determine to make a change in storage of the set of encoded data slices;

determine to make an adjustment to the pillar width number based on the determined change in the storage of the set of encoded data slices; and

generate adjusted encoded data slices for the set of encoded data slices based on the adjustment to the pillar width number to produce an updated set of encoded data slices; and

a third memory section that stores operational instructions that, when executed by the computing device, causes the computing device to;

enable storage of the updated set of encoded data slices in accordance with the determined change in the storage of the set of encoded data slices.

14. The non-transitory computer readable storage device of claim 13, wherein the first subset of encoded data slices comprises:

a number of encoded data slices equaling the decode threshold number.

15. The non-transitory computer readable storage device of claim 13 further comprises:

the first memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

cause the first subset of encoded data slices to be stored in the local memory of the LAN memory;

determine to change the storage of the first subset of encoded data slices from the local memory or the LAN memory to the WAN memory;

the second memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

increase the pillar width number to increase the number of encoded data slices in the set of encoded data slices; and

the third memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

cause storage of at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the WAN memory.

16. The non-transitory computer readable storage device of claim 13 further comprises:

the first memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

cause the first subset of encoded data slices to be stored in the WAN memory;

the second memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

determine to change the storage of the first subset of encoded data slices from the WAN memory to the local memory or the LAN memory;

decrease the pillar width number to decrease the number of encoded data slices in the set of encoded data slices; and

the third memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

cause storage of at least the decode threshold number of encoded data slices of the updated set of encoded data slices in the local memory or the LAN memory.

17. The non-transitory computer readable storage device of claim 13 further comprises:

the first memory section further stores operational instructions that, when executed by the computing device, causes the computing device to;

cause storage a third subset of encoded data slices of a set of encoded data slices in a second different one of the local memory, the LAN memory, and the WAN memory.

18. The non-transitory computer readable storage device of claim 13, wherein the first memory section further stores operational instructions that, when executed by the computing device, causes the computing device to determine to make the adjustment to the pillar width number further by:

determining performance of a distributed storage network (DSN) in which the computing device, the LAN memory, and the WAN memory are affiliated; and

determining a level of adjustment based on the performance of the DSN.