NITRIDE SEMICONDUCTOR LAYER, NITRIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR LAYER

• US 20150380495A1
• Filed: 05/01/2015
• Published: 12/31/2015
• Est. Priority Date: 06/25/2014
• Status: Active Grant

• Current Assignee: Seoul Semiconductor Co., Ltd.
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: ONO, Hiroshi, NUNOUE, Shinya, HIKOSAKA, Toshiki
• Granted Patent: US 9,515,146 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/1075 of field-effect transistors
• CPC Class Codes: H01L 29/151 Compositional structures H01L29/157 and H01L29/158 take precedence
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 29/66522 with an active layer made of a group 13/15 material H01L29/66446 takes precedence
• CPC Class Codes: H01L 29/737 Hetero-junction transistors
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H01L 31/03044 comprising a nitride compounds, e.g. GaN
• CPC Class Codes: H01L 31/035236 : Superlattices; Multiple quantum well structures
• CPC Class Codes: H01L 31/035281 : Shape of the body
• CPC Class Codes: H01L 31/1852 : comprising a growth substrate not being an AIIIBV compound
• CPC Class Codes: H01L 31/1856 : comprising nitride compounds, e.g. GaN
• CPC Class Codes: H01L 33/007 : comprising nitride compounds
• CPC Class Codes: H01L 33/12 : with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/16 : with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: Y02E 10/544 : Solar cells from Group III-V materials
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

According to one embodiment, a nitride semiconductor layer spreading along a first surface is provided. The nitride semiconductor layer includes a first region and a second region. A length of the first region in a first direction parallel to the first surface is longer than a length of the first region in a second direction parallel to the first surface and perpendicular to the first direction. The second region is arranged with the first region in the second direction. A length of the second region in the first direction is longer than a length of the second region in the second direction. A c-axis being is tilted with respect to the second direction for the first region and the second region. The c-axis intersects a third direction perpendicular to the first surface.

Claims

1. A nitride semiconductor layer spreading along a first surface, the nitride semiconductor layer comprising:

a first region, a length of the first region in a first direction parallel to the first surface being longer than a length of the first region in a second direction parallel to the first surface and perpendicular to the first direction; and

a second region arranged with the first region in the second direction, a length of the second region in the first direction being longer than a length of the second region in the second direction,

a c-axis being tilted with respect to the second direction for the first region and the second region,

the c-axis intersecting a third direction perpendicular to the first surface.

2. The layer according to claim 1, wherein an angle between the c-axis and the first surface is not less than 0 degrees and not more than 85 degrees.

3. The layer according to claim 1, wherein an angle between the second direction and a direction of the c-axis projected onto the first surface is not less than 5 degrees and not more than 85 degrees.

4. The layer according to claim 1, wherein the first surface is parallel to one of a (11-22) plane, a (10-11) plane, a (11-20) plane, or a (10-10) plane.

5. The layer according to claim 1, further comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type separated from the first semiconductor layer in the third direction; and

an active layer provided between the first semiconductor layer and the second semiconductor layer.

6. A nitride semiconductor device, comprising:

a substrate including a major surface having an upper surface and a plurality of oblique surfaces, the oblique surfaces being tilted with respect to the upper surface, each length of the oblique surfaces in a first direction parallel to the upper surface being longer than each length of the oblique surfaces in a second direction parallel to the upper surface and perpendicular to the first direction, the oblique surfaces being arranged in the second direction; and

a nitride semiconductor layer grown from the oblique surfaces,

a c-axis of the nitride semiconductor layer being tilted with respect to the second direction,

the c-axis intersecting a third direction perpendicular to the upper surface.

7. The device according to claim 6, wherein at least a portion of the substrate is removed.

9. The device according to claim 6, wherein an angle between the c-axis and the upper surface is not less than 0 degrees and not more than 85 degrees.

10. The device according to claim 6, wherein an angle between the second direction and a direction of the c-axis projected onto the upper surface is not less than 5 degrees and not more than 85 degrees.

11. The device according to claim 6, wherein one of a (11-22) plane, a (10-11) plane, a (11-20) plane, or a (10-10) plane of the nitride semiconductor layer is parallel to the upper surface.

12. The device according to claim 6, wherein the substrate is a silicon substrate.

13. The device according to claim 12, wherein the upper surface is parallel to one of a (113) plane, a (001) plane, a (112), or a (110) plane of silicon.

14. The device according to claim 6, wherein

the substrate has a plurality of recesses arranged in the second direction, and

the oblique surfaces respectively is portions of side surfaces of the recesses.

15. The device according to claim 6, wherein

the substrate has a plurality of recesses arranged in the second direction,

each of the recesses has a first side surface and a second side surface facing each other, and

the oblique surfaces respectively is the first side surfaces of the recesses.

16. The device according to claim 6, wherein a depth of each of the recesses is not less than 0.3 micrometers and not more than 3 micrometers.

17. The device according to claim 6, wherein a depth of each of the recesses is not less than 0.3 times and not more than 3 times a length in the second direction of the upper surface in each space between the recesses.

18. The nitride semiconductor device according to claim 6, wherein

the nitride semiconductor layer includes:

a first semiconductor layer; and

a foundation layer provided between the first semiconductor layer and the substrate, and

an impurity concentration of the first semiconductor layer is higher than an impurity concentration of the foundation layer.

19. The device according to claim 6, further comprising a first electrode, a second electrode, and a third electrode arranged in a plane parallel to the upper surface,

the nitride semiconductor layer being disposed between the substrate and the first electrode, between the substrate and the second electrode, and between the substrate and the third electrode,

the functional layer including a first layer and a second layer,

the second layer being disposed between the first layer and the substrate,

a lattice constant of the first layer being smaller than a lattice constant of the second layer.

8. A nitride semiconductor device, comprising:

a nitride semiconductor layer,

a substrate including a major surface having an upper surface and a plurality of oblique surfaces, the oblique surfaces being tilted with respect to the upper surface, each length of the oblique surfaces in a first direction parallel to the upper surface being longer than each length of the oblique surfaces in a second direction parallel to the upper surface and perpendicular to the first direction, the oblique surfaces being arranged in the second direction, the nitride semiconductor layer being grown from the oblique surfaces of the substrate,

a c-axis of the nitride semiconductor layer being tilted with respect to the second direction,

the c-axis intersecting a third direction perpendicular to the upper surface.

20. A method for manufacturing a nitride semiconductor layer, comprising:

preparing a substrate including a major surface having an upper surface and a plurality of oblique surfaces, the oblique surfaces being tilted with respect to the upper surface, each length of the oblique surfaces in a first direction parallel to the upper surface being longer than each length of the oblique surfaces in a second direction parallel to the upper surface and perpendicular to the first direction, the oblique surfaces being arranged in the second direction; and

growing the nitride semiconductor layer from the oblique surfaces,

a c-axis of the nitride semiconductor layer being tilted with respect to the second direction,

the c-axis intersecting a third direction perpendicular to the upper surface.