ORGANIC ELECTROLUMINESCENT DEVICE

• US 20160005803A1
• Filed: 06/22/2015
• Published: 01/07/2016
• Est. Priority Date: 07/03/2014
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: RYU, Won-Sang, NOH, Sang-Soon, SHIN, Dong-Chae, CHOI, Sun-Young
• Granted Patent: US 9,530,830 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H10K 2102/311 Flexible OLED
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/126 Shielding, e.g. light-blocking means over the TFTs
• CPC Class Codes: H10K 59/873 Encapsulations

Abstract

Disclosed is an organic electroluminescent device (OELD) includes a first substrate including a pixel region that includes an element region and a light emission region; a storage capacitor disposed at the element region, and including a first storage electrode, a first buffer layer on the first storage electrode, and a second storage electrode on the first buffer layer; a second buffer layer on the storage capacitor; a plurality of TFTs on the second buffer layer at the element region; and a passivation layer on the plurality of TFTs, wherein the storage capacitor overlaps at least one of the plurality of TFTs.

Claims

1. An organic electroluminescent device (OELD) comprising:

a first substrate including a pixel region that includes an element region and a light emission region;

a storage capacitor disposed at the element region, and including a first storage electrode, a first buffer layer on the first storage electrode, and a second storage electrode on the first buffer layer;

a second buffer layer on the storage capacitor;

a plurality of TFTs on the second buffer layer at the element region; and

a passivation layer on the plurality of TFTs,

wherein the storage capacitor overlaps at least one of the plurality of TFTs.

2. The OELD of claim 1, further comprising a moisture blocking layer between the first substrate and the first storage electrode.

3. The OELD of claim 2, wherein the first substrate is a flexible substrate.

4. The OELD of claim 1, wherein the first and second storage electrodes are each made of a metal material, and the first buffer layer is made of an inorganic insulating material.

5. The OELD of claim 1, wherein the plurality of TFTs each includes:

a semiconductor layer;

a gate insulating layer on the semiconductor layer;

a gate electrode on the gate insulating layer;

an inter-layered insulating layer on the gate electrode, and including semiconductor contact holes exposing the semiconductor layer; and

a source electrode and a drain electrode on the inter-layered insulating layer, and contacting the semiconductor layer through the corresponding semiconductor contact holes.

6. The OELD of claim 5, wherein the plurality of TFTs includes a switching TFT and a driving TFT, and

wherein the storage capacitor overlaps at least one of the switching TFT and the driving TFT.

7. The OELD of claim 5, wherein the semiconductor layer is made of a poly silicon or oxide semiconductor material.

8. The OELD of claim 6, further comprising a first auxiliary pattern on the inter-layered insulating layer,

wherein the first auxiliary pattern is connected to the drain electrode of the switching TFT, the gate electrode of the driving TFT, and the storage capacitor.

9. The OELD of claim 8, wherein the first auxiliary pattern is connected to the second storage electrode through a storage contact hole that is formed in the inter-layered insulating layer, the gate insulating layer and the second buffer layer to exposes the second storage electrode.

10. The OELD of claim 8, wherein the first auxiliary pattern is connected to the first storage electrode through a storage contact hole that is formed in the inter-layered insulating layer, the gate insulating layer, the second buffer layer and the first buffer layer to exposes the first storage electrode.

11. The OELD of claim 8, wherein the first auxiliary pattern is connected to the gate electrode of the driving TFT through a gate contact hole that is formed in the inter-layered insulating layer to expose the gate electrode of the driving TFT.

12. The OELD of claim 6, further comprising an organic light emitting diode on the passivation layer at the light emission region,

wherein the organic light emitting diode is connected to the drain electrode of the driving TFT through a drain contact hole that is formed in the passivation layer to expose the drain electrode of the driving TFT.