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MICROFABRICATED ULTRASONIC TRANSDUCERS AND RELATED APPARATUS AND METHODS

  • US 20160009549A1
  • Filed: 05/19/2015
  • Published: 01/14/2016
  • Est. Priority Date: 07/14/2014
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • forming a plurality of cavities in a layer of silicon oxide on a first side of a first wafer, the first wafer having a second side opposite the first side;

    bonding a second wafer with the first wafer such that the second wafer seals the plurality of cavities in the layer of silicon oxide;

    annealing the first wafer and the second wafer after bonding them together the annealing utilizing a first temperature;

    thinning the first wafer or the second wafer after the annealing to create a thinned wafer;

    etching a plurality of trenches in the thinned wafer, the plurality of trenches defining a plurality of electrode regions of the thinned wafer;

    filling the plurality of trenches in the thinned wafer with an insulating material;

    forming metal contacts on the plurality of electrode regions of the thinned wafer;

    aligning the thinned wafer with an integrated circuit wafer having integrated circuitry formed therein;

    bonding the thinned wafer with the integrated circuit wafer having integrated circuitry formed therein using the metal contacts on the thinned wafer to contact bonding points on the integrated circuit wafer, wherein bonding the thinned wafer with the integrated circuit wafer is performed at a second temperature less than the first temperature; and

    forming a flexible membrane by thinning, after bonding the thinned wafer with the integrated circuit wafer, the first wafer or the second wafer, whichever was not previously thinned as part of forming the thinned wafer.

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