LIQUID CRYSTAL DISPLAY DEVICE

• US 20160011446A1
• Filed: 09/21/2015
• Published: 01/14/2016
• Est. Priority Date: 07/06/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, SUZUKI, Yukie, KUWABARA, Hideaki, KIMURA, Hajime
• Granted Patent: US 9,766,526 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

Claims

1. (canceled)

2. A liquid crystal display device comprising:

a gate wiring;

a first transistor comprising a first semiconductor layer, a second semiconductor layer wherein the second semiconductor layer includes an impurity element imparting one conductivity type, and a first part of the gate wiring;

a first liquid crystal element comprising a first electrode, a second electrode, and a liquid crystal;

a first color layer;

a second color layer;

a third color layer;

a light shielding film;

a spacer including a first region;

a second transistor comprising a second part of the gate wiring; and

a second liquid crystal element electrically connected to the second transistor,

wherein the spacer is overlapped by the first color layer, the second color layer, and the third color layer,

wherein the first electrode is not overlapped by the first region,

wherein the first electrode is electrically connected to the first transistor,

wherein the first part of the gate wiring is overlapped by the spacer,

wherein the gate wiring, the first color layer, the second color layer, the third color layer, the light shielding film, and the spacer overlap each other.

3. The liquid crystal display device according to claim 2, wherein the spacer is located between the gate wiring and the second electrode.

4. The liquid crystal display device according to claim 2, wherein the first semiconductor layer is overlapped by the spacer.

5. The liquid crystal display device according to claim 2, wherein the liquid crystal is provided between the first electrode and the second electrode.

6. The liquid crystal display device according to claim 2,

wherein the first transistor comprises source and drain electrodes over the first semiconductor layer, and

wherein end portions of the first semiconductor layer are not overlapped by the source and drain electrodes.

7. The liquid crystal display device according to claim 2, wherein the first semiconductor layer includes silicon.

8. A liquid crystal display device comprising:

a gate wiring;

a first transistor comprising a first semiconductor layer, a second semiconductor layer, and a first part of the gate wiring;

a first liquid crystal element comprising a first electrode, a second electrode, and a liquid crystal;

a first color layer;

a second color layer;

a third color layer;

a light shielding film;

a spacer including a first region;

a second transistor comprising a second part of the gate wiring; and

a second liquid crystal element electrically connected to the second transistor,

wherein the spacer is overlapped by the first color layer, the second color layer, and the third color layer,

wherein the first electrode is not overlapped by the first region,

wherein the first electrode is electrically connected to the first transistor,

wherein the first part of the gate wiring is overlapped by the spacer,

wherein the gate wiring, the first color layer, the second color layer, the third color layer, the light shielding film, and the spacer overlap each other.

9. The liquid crystal display device according to claim 8, wherein the spacer is located between the gate wiring and the second electrode.

10. The liquid crystal display device according to claim 8, wherein the first semiconductor layer is overlapped by the spacer.

11. The liquid crystal display device according to claim 8, wherein the liquid crystal is provided between the first electrode and the second electrode.

12. The liquid crystal display device according to claim 8,

wherein the first transistor comprises source and drain electrodes over the first semiconductor layer, and

wherein end portions of the first semiconductor layer are not overlapped by the source and drain electrodes.

13. The liquid crystal display device according to claim 8, wherein the first semiconductor layer includes silicon.