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MANAGING INSTRUCTION ORDER IN A PROCESSOR PIPELINE

  • US 20160011876A1
  • Filed: 07/11/2014
  • Published: 01/14/2016
  • Est. Priority Date: 07/11/2014
  • Status: Abandoned Application
First Claim
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1. A method for executing instructions in a processor, the method comprising:

  • classifying, in at least one stage of a pipeline of the processor, operations to be performed by instructions, the classifying including;

    classifying a first set of operations as operations for which out-of-order execution is allowed, andclassifying a second set of operations as operations for which out-of-order execution with respect to one or more specified operations is not allowed, the second set of operations including at least store operations; and

    selecting results of instructions executed out-of-order to commit the selected results in-order, the selecting including, for a first result of a first instruction and a second result of a second instruction executed before and out-of-order relative to the first instruction;

    determining which stage of the pipeline stores the second result, andcommitting the first result directly from the determined stage over a forwarding path, before committing the second result.

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