AC Stress Mode to Screen Out Word Line to Word Line Shorts
First Claim
1. In a memory circuit having an array of multiple blocks of non-volatile memory cells formed along word-lines, a method of determining whether one or more of the word-lines are defective, the method comprising:
- performing an intra-block stress operation on one or more blocks of the array, the stress operation having a plurality of stress cycles where each stress cycle for a selected block includes;
applying a high voltage level to a first set of one or more word lines of the selected block while concurrently setting a second set of one or more word lines of the selected block at a low voltage level, where at least one word line of the first set is adjacent to at least one word line of the second set; and
subsequently applying the high voltage level to the second set of word lines while concurrently setting the first set of word lines at the low voltage level; and
subsequently performing a defect determination operation, includingperforming a write operation on the selected block; and
determining whether the write operation was successful.
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Accused Products
Abstract
A number of techniques for determining defects in non-volatile memory arrays are presented, which are particularly applicable to 3D NAND memory, such as that of the BiCS type. Word line to word shorts within a memory block are determined by application of an AC stress mode, followed by a defect detection operation. An inter-block stress and detection operation can be used determine word line to word line leaks between different blocks. Select gate leak line leakage, both the word lines and other select lines, is consider, as are shorts from word lines and select lines to local source lines. In addition to word line and select line defects, techniques for determining shorts between bit lines and low voltage circuitry, as in the sense amplifiers, are presented.
16 Citations
23 Claims
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1. In a memory circuit having an array of multiple blocks of non-volatile memory cells formed along word-lines, a method of determining whether one or more of the word-lines are defective, the method comprising:
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performing an intra-block stress operation on one or more blocks of the array, the stress operation having a plurality of stress cycles where each stress cycle for a selected block includes; applying a high voltage level to a first set of one or more word lines of the selected block while concurrently setting a second set of one or more word lines of the selected block at a low voltage level, where at least one word line of the first set is adjacent to at least one word line of the second set; and subsequently applying the high voltage level to the second set of word lines while concurrently setting the first set of word lines at the low voltage level; and subsequently performing a defect determination operation, including performing a write operation on the selected block; and determining whether the write operation was successful. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification