THERMAL MANAGEMENT CIRCUIT MATERIALS, METHOD OF MANUFACTURE THEREOF, AND ARTICLES FORMED THEREFROM

• US 20160014878A1
• Filed: 04/22/2015
• Published: 01/14/2016
• Est. Priority Date: 04/25/2014
• Status: Abandoned Application

• Current Assignee: Rogers Corporation (Rogers Communications Inc.)
• Original Assignee: Rogers Corporation (Rogers Communications Inc.)
• Inventors: Kilhenny, Brett W.
• Application Number:
  US14/692,981
• Publication Number:
  US 20160014878A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48464 the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/3735 Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 2933/0075 relating to heat extraction or cooling elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/641 characterized by the materials
• CPC Class Codes: H01L 33/647 the elements conducting electric current to or from the semiconductor body
• CPC Class Codes: H05K 1/0201 Thermal arrangements, e.g. for cooling, heating or preventing overheating
• CPC Class Codes: H05K 1/0206 by printed thermal vias
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/03 Use of materials for the substrate
• CPC Class Codes: H05K 1/053 : the metal substrate being covered by an inorganic insulating layer
• CPC Class Codes: H05K 1/09 : Use of materials for the conductive, e.g. metallic pattern
• CPC Class Codes: H05K 1/115 : Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/09563 : Metal filled via
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2201/10166 : Transistor
• CPC Class Codes: H05K 2203/0315 : Oxidising metal
• CPC Class Codes: H05K 2203/1338 : Chemical vapour deposition
• CPC Class Codes: H05K 3/0094 : Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
• CPC Class Codes: H05K 3/0097 : Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards H05K3/0052 takes precedence
• CPC Class Codes: H05K 3/12 : using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
• CPC Class Codes: H05K 3/32 : electrically connecting electric components or wires to printed circuits
• CPC Class Codes: H05K 3/4038 : Through-connections; Vertical interconnect access [VIA] connections H05K3/403, H05K3/42 take precedence
• CPC Class Codes: H05K 3/44 : Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits H05K3/0058, H05K3/4608, and H05K3/4641 take precedence
• CPC Class Codes: H05K 3/445 : having insulated holes or insulated via connections through the metal core

Abstract

A thermal management circuit material comprises a thermally conductive metallic core substrate having at least one through-hole via, non-metallic dielectric layers deposited on both sides of the metallic core substrate and on the containing walls of the through-hole via, electrically conductive metal layers on the non-metallic dielectric layers and an electrically conductive metal-containing core element filling the insulated through-hole via connecting at least a portion of each of the electrically conductive metal layers. Also disclosed are methods of making such circuit materials, comprising forming non-metallic dielectric layers by vapor deposition of a non-metallic material, for example by reacting an oxygen-containing precursor with an aluminum containing precursor and/or reacting a nitrogen-containing precursor with an aluminum or boron containing precursor on the surface of the metallic core substrate. Articles having a heat-generating electronic device such as an HBLED mounted in the circuit material are also disclosed.

Claims

1. A thermal management circuit material, capable of use for mounting an electronic device, comprising:

a thermally conductive metallic core substrate;

a first non-metallic dielectric layer on a first side of the metallic core substrate;

a second non-metallic dielectric substrate layer on a second side of the thermally conductive metallic core substrate, which second side is opposite from the first side of the metallic core substrate;

a first electrically conductive metal layer on the first oxide non-metallic dielectric layer;

a second electrically conductive metal layer on the second non-metallic dielectric layer;

at least one through-hole via filled with an electrically conductive metal forming a metal-containing core element that electrically connects at least a portion of each of the first and second electrically conductive metal layers, wherein the walls defining the through-hole via have an intermediate non-metallic dielectric layer transversely joining the first non-metallic dielectric layer and the second non-metallic dielectric layer, which intermediate non-metallic dielectric layer insulates the metal-containing core element in the through-hole via from the thermally conductive metal core substrate;

wherein the first, second, and intermediate non-metallic dielectric layers are made by a process comprising depositing the reaction product of volatile precursor compounds on at least a surface area portion of the metallic core substrate, wherein the deposited reaction product comprises a non-metallic compound selected from the group consisting of a metal oxide, metal nitride, boron oxide, boron nitride, and combinations.

2. The circuit material of claim 1 wherein the non-metallic dielectric layers are made by CVD or ALD.

3. The circuit material of claim 1 wherein the non-metallic dielectric layers comprise a material selected from the group consisting of aluminum oxide, boron oxide, aluminum nitride, boron nitride, and combinations thereof.

4. The circuit material of claim 1 wherein the first and second non-metallic dielectric layers have a thermal conductivity of greater than or equal to about 5 Watt per meter-degree Kelvin and a dielectric strength of greater than or equal to about 20 KV per mm.

5. The circuit material of claim 1 wherein the first and second non-metallic dielectric layers each have a thickness of 1 to 15 micrometers.

6. The circuit material of claim 1 wherein the thermally conductive metallic core substrate has a thickness of 0.25 to 3.0 mm.

7. The circuit material of claim 1 wherein the circuit material, having patterned or unpatterned electrically conductive metal layers, forms a panel having an area that is 15 to 20 times the area of a conventional panel that is 4.5 inches by 4.5 inches.

8. The circuit material of claim 1 wherein the metallic core substrate comprises aluminum or an alloy of aluminum with one or more metals selected from the group consisting of magnesium, titanium, zirconium, tantalum, and beryllium.

9. The circuit material of claim 1 further comprises an outer adhesion-improving layer directly bonding the first electrically conductive metal layer to the first non-metallic dielectric layer, the second electrically conductive metal layer to the second non-metallic dielectric layer, and the electrically conductive metal-containing core element in the via to the intermediate non-metallic dielectric layer.

10. The circuit material of claim 9 wherein the outer adhesion-improving layer is a metallic seed layer for plating of the electrically conductive metal layers, which metallic seed layer of substantially lesser thickness than the non-metallic layer on which it is coated.

11. The circuit material of claim 1 wherein there is a layer of sputtered metallic seed metal in the through-hole via between the electrically conductive metal forming the metal-containing core element in the via and the intermediate non-metallic layer forming the walls of the through-hole via.

12. The circuit material of claim 1 wherein the metal core substrate has been made by a process that comprises pre-treating by electrolytic oxidization, to a preselected depth, at least a surface area portion of the metal core substrate prior to depositing the non-metallic dielectric layers.

13. An article comprising a heat-generating electronic device mounted on the circuit material of claim 1.

14. The article of claim 13 wherein the electronic device is selected from the group consisting of an optoelectronic device, an RF device, or a microwave device, a switching or amplifying semiconductor, or a power transistor, wherein the electronic device is supported on the first electrically conductive metal layer of the circuit material.

15. The article of claim 14, wherein the electronic device is an LED.

16. A method of making a circuit material comprising providing a metallic core substrate that is thermally conductive;

forming at least one through-hole via in the metallic core substrate;

forming non-metallic dielectric layers on opposite sides and in through-hole vias of the metallic core substrate by depositing on the surface of the metallic core substrate a non-metallic material; and

applying electrically conductive metal layers over the surface of the non-metallic dielectric layers at least on opposite sides of the metallic core substrate.

17. The method of claim 16, wherein the non-metallic dielectric layers have been formed, in a deposition chamber, by chemical vapor deposition or atomic layer deposition.

18. The method of claim 16, wherein the non-metallic dielectric layers have been formed, in a deposition chamber, by chemical vapor deposition or atomic layer deposition of aluminum oxide comprising:

(a) providing an aluminum alkoxide precursor that is dissolved, emulsified or suspended in a liquid;

(b) providing a vapor generated from the aluminum alkoxide precursor; and

(c) depositing an aluminum oxide film from said vaporized precursor on a substrate.

19. The method of claim 18, wherein the chemical vapor deposition or atomic layer deposition of aluminum oxide further comprises introducing into the deposition chamber, separately from said vaporized aluminum alkoxides, an oxidizing reactant.

20. The method of claim 19, wherein said oxidizing reactant is selected from the group consisting of oxygen, ozone, water, hydrogen peroxide, nitrous oxide, and combinations thereof.

21. The method of claim 18, wherein the non-metallic layers comprise a boron nitride film or boron oxide film made by introducing a boron-containing precursor into a deposition chamber holding the metallic core substrate, depositing a boron-containing film onto the metallic core substrate in the chamber from the boron-containing precursor;

treating the boron-containing film to increase the nitrogen or oxygen content in the film, thereby forming a boron nitride film or boron oxide film; and

repeating the introducing, depositing, and treating until a desired thickness of the boron nitride film or boron oxide film is obtained.

22. The method of claim 21, wherein said treating comprises exposing the boron-containing film to a nitrogen-containing or oxygen-containing precursor.

23. The method of claim 22, wherein the oxygen-containing precursor is selected from the group consisting of oxygen gas, nitric oxide (NO), nitrous oxide (N₂O), carbon dioxide (CO₂), and water (H₂O) and the boron-containing precursor is selected from the group consisting of diborane, borazine, and alkyl-substituted derivatives of borazine.

24. The method of claim 22, wherein the nitrogen-containing precursor that is selected from the group consisting of ammonia, nitrogen gas, and hydrazine.

25. The method of claim 16 wherein the through-hole via is filled with a metal-containing core element electrically connecting the electrically conducive layers on opposite sides of the metallic core substrate during the plating of the electrically conductive metal layers.

26. The method of claim 16 wherein the through-hole via is filled with a metal-containing core element electrically connecting the electrically conducive layers on opposite sides of the metallic core substrate following application of the electrically conductive metal layers, wherein the metal-containing core element is made by filling the through-hole via with a metallic paste comprising metal particles and an organic resin.

27. The method of claim 16 wherein, after forming the non-metallic dielectric layers and before applying electrically conductive metal over the surface of the non-metallic dielectric layers, coating a metallic seed layer onto the surface of the non-metallic layers.

28. The method of claim 16 further comprising, after applying metal layers onto the surface of the non-metallic dielectric layers, dividing the circuit material into a plurality of smaller panels each having dimensions within the range of about 4.0 to 5.0 inches on each of two sides.

29. The method of claim 16, wherein the metal layers are patterned and wherein the method further comprises mounting high-brightness light-emitting diode onto the patterned circuit material.