ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND TOUCH DISPLAY DEVICE

• US 20160018935A1
• Filed: 04/25/2014
• Published: 01/21/2016
• Est. Priority Date: 12/23/2013
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: BOE Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd. (BOE Technology Group Co., Ltd.)
• Inventors: WEI, Xiangdong, HAO, Xueguang, LI, Cheng, AN, Seongjun, RYU, Bongyeol
• Granted Patent: US 9,619,063 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2203/04103 Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
• CPC Class Codes: G06F 2203/04107 Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

Embodiments of the present invention provide an array substrate and a manufacturing method thereof and a touch display device. The array substrate comprises multiple data lines, multiple gate lines and multiple thin film transistors. The data lines and the gate lines intersect with each other in different planes to divide the array substrate into multiple pixel units, in each of which a thin film transistor is provided, wherein the array substrate further comprises multiple first touch sensing electrodes and multiple second touch sensing electrodes. The first touch sensing electrodes are provided below active regions of the thin film transistors and also serve as metal shielding layers for blocking light emitted by a backlight source. The first touch sensing electrodes and the second touch sensing electrodes intersect with each other in different planes, and capacitances are formed at intersections of the first touch sensing electrodes and the second touch sensing electrodes.

Claims

1. An array substrate, comprising a plurality of data lines, a plurality of gate lines and a plurality of thin film transistors, the plurality of data lines and the plurality of gate lines intersecting with each other in different planes to divide the array substrate into a plurality of pixel units, the thin film transistor being provided in each pixel unit, wherein the array substrate further comprises a plurality of first touch sensing electrodes and a plurality of second touch sensing electrodes, wherein

the first touch sensing electrodes are provided below active regions of the thin film transistors, and the first touch sensing electrodes also serve as metal shielding layers for blocking light emitted from a backlight source, and

the first touch sensing electrodes and the second touch sensing electrodes intersect with each other in different planes, and capacitances are formed at intersections of the first touch sensing electrodes and the second touch sensing electrodes.

2. The array substrate according to claim 1, wherein a common gate line for receiving a common signal is provided between every two adjacent gate lines, at least a part of the common gate line is located to correspond to a drain of the thin film transistor and the first touch sensing electrode, so that a first storage capacitance is formed between the common gate line and the drain of the thin film transistor, and that a second storage capacitance is formed between the common gate line and the first touch sensing electrode.

3. The array substrate according to claim 1, wherein material of the active layers of the thin film transistors comprises low-temperature polycrystalline silicon;

and

the array substrate further comprises a buffer layer, the active layers of the thin film transistors are provided on an upper surface of the buffer layer, the first touch sensing electrodes are provided on a lower surface of the buffer layer, and the second touch sensing electrodes are provided above the buffer layer.

4. The array substrate according to claim 3, wherein in each of the pixel units, the active layer of the thin film transistor is connected to the corresponding first touch sensing electrode through a first via hole penetrating through the buffer layer.

5. The array substrate according to claim 2, wherein the array substrate comprises a gate insulating layer, an intermediate insulating layer, a planarization layer and a passivation layer, wherein:

the gate insulating layer covers the active layers of the thin film transistors, and the gate lines and the common gate lines are provided on an upper surface of the gate insulating layer;

the intermediate insulating layer covers the gate lines and the common gate lines, and the sources and drains of the thin film transistors are provided on an upper surface of the intermediate insulating layer;

the planarization layer covers the sources and drains of the thin film transistors, and the second touch sensing electrodes are provided above the planarization layer;

the passivation layer covers the common electrodes, and pixel electrodes of the array substrate are provided on an upper surface of the passivation layer; and

both the sources and drains of the thin film transistors are connected to the active layers of the thin film transistors through second via holes penetrating through the intermediate insulating layer and the gate insulating layer, and the pixel electrodes are connected to the drains of the thin film transistors through third via holes penetrating through the passivation layer and the planarization layer.

6. The array substrate according to claim 1, wherein the first touch sensing electrodes are touch detecting electrodes, while the second touch sensing electrodes are touch driving electrodes.

7. The array substrate according to claim 1, wherein a first floating electrode is provided between every two adjacent first touch sensing electrodes.

8. The array substrate according to claim 1, wherein the second touch sensing electrodes also serve as common electrodes of the array substrate.

9. The array substrate according to claim 1, wherein a second floating electrode is provided between every two adjacent second touch sensing electrodes.

10. A touch display device, comprising an array substrate, a touch driving circuit and a touch control circuit, wherein the array substrate is the array substrate according to claim 1, wherein

the first touch sensing electrodes and the second touch sensing electrodes are connected to the touch driving circuit and the touch control circuit, respectively,

the touch driving circuit is configured to provide a touch driving signal to one of the first touch sensing electrodes and the second touch sensing electrodes in a touch time, and

when a touch operation is performed, the touch driving signal is coupled to the other of the first touch sensing electrodes and the second touch sensing electrodes to form a position sensing signal, and the position sensing signal is output to the touch control circuit.

11. The touch display device according to claim 10, wherein the touch display device further comprises a display driving circuit, the gate lines and the data lines are connected to the display driving circuit, respectively, wherein

the display driving circuit is configured to output a scanning signal to the gate lines and provide a gray scale signal to the data lines in a display time.

12. The touch display device according to claim 11, wherein a first floating electrode connected to the touch driving circuit is provided between every two adjacent first touch sensing electrodes, wherein,

in the touch time, the touch driving circuit outputs an electrical signal same as a common signal to the first floating electrode;

and

in the display time, the first floating electrode is set to float.

13. The touch display device according to claim 11, wherein

a second floating electrode connected to the touch driving circuit is provided between every two adjacent second touch sensing electrodes, wherein,

in the touch time, the touch driving circuit outputs an electrical signal same as the common signal to the second floating electrode;

and

in the display time, the second floating electrode is set to float.

14. A manufacturing method of an array substrate, comprising steps of:

forming a first set of patterns, the first set of patterns comprising first touch sensing electrodes;

forming a second set of patterns, the second set of patterns comprising active layers of thin film transistors, the active regions of the active layers being located above the first touch sensing electrodes so that the first touch sensing electrodes also serve as metal shielding layers for blocking light emitted by a backlight source;

forming a third set of patterns, the third set of patterns comprising the gate lines and gates of the thin film transistors;

forming a fourth set of patterns, the fourth set of patterns comprising data lines and sources and drains of the thin film transistors; and

forming a fifth set of patterns, the fifth set of patterns comprising second touch sensing electrodes, wherein the second touch sensing electrodes and the first touch sensing electrodes intersect with each other in different planes, and capacitances are formed at intersections of the first touch sensing electrodes and the second touch sensing electrodes.

15. The manufacturing method according to claim 14, wherein the third set of patterns further comprises a common gate line located between every two adjacent gate lines, the common gate line is used for receiving a common signal, and at least a part of the common gate line is located to correspond to the drain of the thin film transistor and the first touch sensing electrode, so that a first storage capacitance is formed between the common gate line and the drain of the thin film transistor, and a second storage capacitance is formed between the common gate line and the first touch sensing electrode.

16. The manufacturing method according to claim 14, wherein the material for forming the second set of patterns comprises low-temperature polycrystalline silicon;

and

the manufacturing method further comprises a step of forming a buffer layer between the step of forming a first set of patterns and the step of forming a second set of patterns, so that the active layers of the thin film transistors are provided on an upper surface of the buffer layer, and the first touch sensing electrodes are provided on a lower surface of the buffer layer.

17. The manufacturing method according to claim 16, wherein the manufacturing method, between the step of forming a first set of patterns and the step of forming a second set of patterns, further comprises steps of forming first via holes penetrating through the buffer layer;

and then, in the step of forming a second set of patterns, filling the first via holes so that the active layers are connected to the respective first touch sensing electrodes through the first via holes.

18. The manufacturing method according to claim 14, wherein the first set of patterns further comprises a first floating electrode between every two adjacent first touch sensing electrodes.

19. The manufacturing method according to claim 14, wherein the second touch sensing electrodes also serve as common electrodes of the array substrate.

20. The manufacturing method according to claim 14, wherein the fifth set of patterns further comprises a second floating electrode between every two adjacent second touch sensing electrodes.

21. The manufacturing method according to claim 15, further comprising steps of:

forming a gate insulating layer between the step of forming a second set of patterns and the step of forming a third set of patterns, so that the gate lines and the common gate lines are provided on an upper surface of the gate insulating layer;

forming an intermediate insulating layer and second via holes penetrating through the gate insulating layer and the intermediate insulating layer between the step of forming a third set of patterns and the step of forming a fourth set of patterns, so that the sources and drains of the thin film transistors are located on an upper surface of the intermediate insulating layer, and the sources and drains of the thin film transistors are connected to the respective active layers through the second via holes;

forming a planarization layer between the step of forming a fourth set of patterns and the step of forming a fifth set of patterns, so that the planarization layer covers the sources and drains of the thin film transistors, and the second touch sensing electrodes are provided above the planarization layer;

forming a passivation layer after the step of forming a fifth set of patterns, so that the passivation layer covers the common electrodes;

forming third via holes penetrating through the passivation layer; and

forming patterns including pixel electrodes, so that the pixel electrodes are connected to the drains of the respective thin film transistors through the third via holes.