METHOD FOR PRODUCING GROUP III NITRIDE SEMICONDUCTOR AND TEMPLATE SUBSTRATE

• US 20160020285A1
• Filed: 09/28/2015
• Published: 01/21/2016
• Est. Priority Date: 12/26/2008
• Status: Active Grant

• Current Assignee: Toyoda Gosei Company Limited (Toyota Motor Corporation)
• Original Assignee: Toyoda Gosei Company Limited (Toyota Motor Corporation)
• Inventors: Nakada, Naoyuki, Okuno, Koji, Ushida, Yasuhisa
• Granted Patent: US 9,318,559 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02636 Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02647 Lateral overgrowth
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/2003 Nitride compounds

Abstract

A semiconductor substrate includes a sapphire substrate including a c-plane main surface and a groove in a surface thereof, the groove including side surfaces and a bottom surface, and a Group III nitride semiconductor layer formed on the sapphire substrate. The side surfaces of the groove are an a-plane of sapphire. An axis of the Group III nitride semiconductor layer, perpendicular to one of the side surface of the groove, is a c-axis of Group III nitride semiconductor. A plane of the Group III nitride semiconductor, parallel to the main surface of the sapphire substrate, is an a-plane of Group III nitride semiconductor.

Claims

1. A semiconductor substrate, comprising:

a sapphire substrate including a c-plane main surface and comprising a groove in a surface thereof, the groove including side surfaces and a bottom surface; and

a Group III nitride semiconductor layer formed on the sapphire substrate,

wherein the side surfaces of the groove are an a-plane of sapphire,

wherein an axis of the Group III nitride semiconductor layer, perpendicular to one of the side surfaces of the groove, is a c-axis of Group III nitride semiconductor, and

wherein a plane of the Group III nitride semiconductor, parallel to the main surface of the sapphire substrate, is an a-plane of Group III nitride semiconductor.

2. A semiconductor substrate according to claim 1, wherein the surface of the sapphire substrate is nitrided, and the Group III nitride semiconductor layer is formed without depositing a buffer layer.

3. A semiconductor substrate according to claim 1, wherein the sapphire substrate comprises a buffer film formed along an entire surface thereof, and the Group III nitride semiconductor layer is formed via the buffer film on the sapphire substrate.

4. A semiconductor substrate according to claim 1, wherein the groove is formed in a stripe pattern.

5. A semiconductor substrate according to claim 3, wherein the buffer film comprises Al_xGa_1-xN (0≦

x≦

1).

6. A semiconductor substrate according to claim 5, wherein the buffer film has a thickness of 150 Å

or less.