Adaptive Flash Tuning

• US 20160034206A1
• Filed: 08/03/2015
• Published: 02/04/2016
• Est. Priority Date: 08/04/2014
• Status: Active Grant

• Current Assignee: RPX Corporation
• Original Assignee: Nvmdurance Limited
• Inventors: Ryan, Conor Maurice, Sullivan, Joseph
• Granted Patent: US 9,569,120 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/0605 by facilitating the interaction with a user or administrator
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0634 by changing the state or mode of one or more devices
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0649 Lifecycle management
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0655 Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/16 : for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/26 : Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/349 : Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 29/36 : Data generation devices, e.g. data inverters
• CPC Class Codes: G11C 29/38 : Response verification devices
• CPC Class Codes: G11C 29/44 : Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/50012 : of timing
• CPC Class Codes: G11C 29/52 : Protection of memory contents; Detection of errors in memory contents

Abstract

The present invention includes embodiments of systems and methods for increasing the operational efficiency and extending the estimated operational lifetime of a flash memory storage device (and its component flash memory chips, LUNs and blocks of flash memory) by monitoring the health of the device and its components and, in response, adaptively tuning the operating parameters of flash memory chips during their operational lifetime, as well as employing other less extreme preventive measures in the interim, via an interface that avoids the need for direct access to the test modes of the flash memory chips. In an offline characterization phase, “test chips” from a batch of recently manufactured flash memory chips are used to simulate various usage scenarios and measure the performance effects of writing and attempting to recover (read) test patterns written with different sets of operating parameters over time (simulating desired retention periods).

Claims

1. A flash memory drive comprising:

(a) one or more flash memory chips, each chip including one or more LUNs, and each LUN including one or flash memory blocks and one or more control registers storing operating parameters associated with that LUN; and

(b) a flash controller, external to the one or more flash memory chips, that issues read, write and erase controller memory commands to the flash memory chips during the operational lifetime of the flash memory drive, wherein

(i) each of the flash memory chips implements the controller memory commands by applying varying levels of electrical stimuli to the flash memory blocks in a LUN in accordance with current values of the operating parameters associated with that LUN; and

(ii) the flash controller, over time during the operational lifetime of the flash memory drive,

(1) monitors health metrics, including a cumulative number of program/erase cycles and one or more other indicators of wear of the flash memory blocks in that LUN; and

(2) modifies, in response to the monitored health metrics, the values of one or more of the operating parameters associated with that LUN.

2. The flash memory drive of claim 1, wherein the health metrics include BER data resulting from reading the contents of one or more flash memory blocks in that LUN.

3. The flash memory drive of claim 1, wherein the health metrics include timing information relating to one or more controller memory commands performed on the flash memory blocks in that LUN.

4. The flash memory drive of claim 1, wherein the health metrics include previously stored historical health metric data relating to the flash memory blocks in that LUN.

6. The flash memory drive of claim 4, wherein the health metrics include BER data resulting from reading the contents of one or more flash memory blocks in that LUN.

7. The flash memory drive of claim 4, wherein the health metrics include timing information relating to one or more controller memory commands performed on the flash memory blocks in that LUN.

8. The flash memory drive of claim 4, wherein the health metrics include previously stored historical health metric data relating to the flash memory blocks in that LUN.

9. The flash memory drive of claim 4, wherein the preventive measures include resting one or more flash memory blocks in that LUN.

10. The flash memory drive of claim 4, wherein the preventive measures include reducing the usage of one or more flash memory blocks in that LUN.

5. A flash memory drive comprising:

(a) one or more flash memory chips, each chip including one or more LUNs, and each LUN including one or flash memory blocks and one or more control registers storing operating parameters associated with that LUN; and

(b) a flash controller, external to the one or more flash memory chips, that issues read, write and erase controller memory commands to the flash memory chips during the operational lifetime of the flash memory drive, wherein

(i) each of the flash memory chips implements the controller memory commands by applying varying levels of electrical stimuli to the flash memory blocks in a LUN in accordance with current values of the operating parameters associated with that LUN; and

(ii) the flash controller, over time during the operational lifetime of the flash memory drive,

(1) monitors health metrics, including a cumulative number of program/erase cycles and one or more other indicators of wear of the flash memory blocks in that LUN; and

(2) employs one or more preventive measures, in response to the monitored health metrics, to reduce the rate of wear of one or more flash memory blocks in that LUN.

11. A method for increasing the operational lifetime of a flash memory drive, wherein the flash memory drive includes one or more flash memory chips, each chip includes one or more LUNs, and each LUN includes one or flash memory blocks and one or more control registers storing operating parameters associated with that LUN, the method comprising the following steps:

(a) issuing, from a flash controller, external to the one or more flash memory chips, read, write and erase controller memory commands to the flash memory chips during the operational lifetime of the flash memory drive;

(b) implementing the controller memory commands by applying varying levels of electrical stimuli to the flash memory blocks in a LUN in accordance with current values of the operating parameters associated with that LUN;

(c) monitoring health metrics over time during the operational lifetime of the flash memory drive, wherein the health metrics include a cumulative number of program/erase cycles and one or more other indicators of wear of the flash memory blocks in that LUN; and

(d) modifying, in response to the monitored health metrics, the values of one or more of the operating parameters associated with that LUN.

12. The method of claim 11, wherein the health metrics include BER data resulting from reading the contents of one or more flash memory blocks in that LUN.

13. The method of claim 11, wherein the health metrics include timing information relating to one or more controller memory commands performed on the flash memory blocks in that LUN.

14. The method of claim 11, wherein the health metrics include previously stored historical health metric data relating to the flash memory blocks in that LUN.

15. A method for increasing the operational lifetime of a flash memory drive, wherein the flash memory drive includes one or more flash memory chips, each chip includes one or more LUNs, and each LUN includes one or flash memory blocks and one or more control registers storing operating parameters associated with that LUN, the method comprising the following steps:

(a) issuing, from a flash controller, external to the one or more flash memory chips, read, write and erase controller memory commands to the flash memory chips during the operational lifetime of the flash memory drive;

(b) implementing the controller memory commands by applying varying levels of electrical stimuli to the flash memory blocks in a LUN in accordance with current values of the operating parameters associated with that LUN;

(c) monitoring health metrics over time during the operational lifetime of the flash memory drive, wherein the health metrics include a cumulative number of program/erase cycles and one or more other indicators of wear of the flash memory blocks in that LUN; and

(d) employing one or more preventive measures, in response to the monitored health metrics, to reduce the rate of wear of one or more flash memory blocks in that LUN.

16. The method of claim 15, wherein the health metrics include BER data resulting from reading the contents of one or more flash memory blocks in that LUN.

17. The method of claim 15, wherein the health metrics include timing information relating to one or more controller memory commands performed on the flash memory blocks in that LUN.

18. The method of claim 15, wherein the health metrics include previously stored historical health metric data relating to the flash memory blocks in that LUN.

19. The method of claim 15, wherein the preventive measures include resting one or more flash memory blocks in that LUN.

20. The method of claim 15, wherein the preventive measures include reducing the usage of one or more flash memory blocks in that LUN.