SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

• US 20160035816A1
• Filed: 07/11/2015
• Published: 02/04/2016
• Est. Priority Date: 07/29/2014
• Status: Active Grant

• Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation (Semiconductor Manufacturing International Corporation)
• Original Assignee: Semiconductor Manufacturing International (Shanghai) Corporation (Semiconductor Manufacturing International Corporation)
• Inventors: HONG, ZHONGSHAN, PU, XIANYONG
• Granted Patent: US 9,514,881 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01F 10/265 Magnetic multilayers non exchange-coupled H01F10/32 takes precedence
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01F 41/14 for applying magnetic films to substrates
• CPC Class Codes: H01F 41/308 lift-off processes, e.g. ion milling, for trimming or patterning
• CPC Class Codes: H01L 21/4814 Conductive parts
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor structure is provided. The semiconductor structure includes a substrate; and a plurality of parallel first conductive layers formed on the substrate. The semiconductor structure also includes a composite magnetic structure having a plurality of magnetic layers and a plurality of insulation layers with a sandwich arrangement formed on a portion of the substrate and portions of surfaces of the plurality of first conductive layers. Further, the semiconductor structure includes a plurality of first conductive vias and a plurality of second conductive vias formed on the first conductive layers at both sides of the composite magnetic structure. Further, the semiconductor structure also includes a plurality of second conductive layers formed on a top surface of the composite magnetic structure, top surfaces of the first conductive vias, and top surfaces of the second conductive vias to form at least one coil structure wrapping around the composite magnetic structure.

Claims

1. A semiconductor structure, comprising:

a substrate;

a plurality of parallel first conductive layers formed on the substrate;

a composite magnetic structure having a plurality of magnetic layers and a plurality of insulation layers with a sandwich arrangement formed on a portion of a surface of the substrate and portions of surfaces of the plurality of the first conductive layers;

a plurality of first conductive vias and a plurality of second conductive vias formed on the first conductive layers at both sides of the composite magnetic structure; and

a plurality of second conductive layers formed on a top surface of the composite magnetic structure;

top surfaces of the first conductive vias, and top surfaces of the second conductive vias to form at least one coil structure wrapping around the composite magnetic structure.

2. The semiconductor structure according to claim 1, wherein:

each of the first conductive layers has a first port and a second port;

the plurality of first ports of the first conductive layers are at a same side of the first conductive layers; and

the plurality of second ports of the second conductive layers are at the other side of the first conductive layers;

3. The semiconductor structure according to claim 2, wherein:

the composite magnetic structure exposes the first ports and the second ports of the first conductive layers; and

the plurality of the first conductive vias are formed on surfaces of the plurality of first ports of the first conductive layers; and

the plurality of the second conductive vias are formed on the surfaces of the plurality of second ports of the first conductive layers.

4. The semiconductor structure according to claim 1, wherein:

two ends of each of the second conductive layers connect with a first conductive via and a second conductive via respectively; and

the first conductive via and the second conductive via connecting with the second conductive layer are formed on two adjacent first conductive layers respectively.

5. The semiconductor structure according to claim 1, wherein:

two adjacent magnetic layers are insulated by an insulation layer.

6. The semiconductor structure according to claim 1, wherein:

a number of the magnetic layers is in a range of 2˜

100.

7. The semiconductor structure according to claim 1, wherein:

the magnetic layers are made of one or more of Co, Fe, CoFeB, NiFe, NiB, and Ni.

8. The semiconductor structure according to claim 1, wherein:

the insulation layers are made of one or more of Sift, SiN, low dielectric constant material, polymer, and metal oxide.

9. The semiconductor structure according to claim 1, wherein:

the first metal layers and the second metal layers are made of one of Al, and Cu.

10. The semiconductor structure according to claim 1, wherein:

the first conductive vias and the second conductive vias are made of one or more of Cu, and W.

11. The semiconductor structure according to claim 1, wherein:

the coil structures are more than two; and

the coil structures and the composite magnetic structure are configured as a transformer.

12. The semiconductor structure according to claim 1, further including:

a dielectric layer formed on the surface of the substrate and the first conductive layers; and

a top surface of the dielectric layer levels with the top surfaces of the first conductive vias and the top surfaces of the second conductive vias.

13. The semiconductor structure according to claim 1, wherein:

a projection view of the second conductive layers on the substrate has a certain angle with the first conductive layers; and

the angle is in a range of approximately 15°

˜

75°

.

14. A method for fabricating a semiconductor structure, comprising:

providing a substrate;

forming a plurality of parallel first conductive layers on one surface of the substrate;

forming a composite magnetic structure having a plurality of magnetic layers and a plurality of insulation layers with a sandwich arrangement on a portion of the surface of the substrate and portions of surfaces of the plurality of first conductive layers;

forming a plurality of first conductive vias and a plurality of second conductive vias on the plurality of first conductive layers at both sides of the first conductive layers respectively; and

forming a plurality of second conductive layers on a top surface of the composite magnetic structure, top surfaces of the first conductive vias, and top surfaces of the second conductive vias to form at least one coil structure wrapping around the composite magnetic structure.

15. The method according to claim 14, wherein forming the composite magnetic structure further includes:

forming an insulation film on the substrate;

forming a magnetic film on the insulation film;

repeating processes for sequentially forming the insulation film and the magnetic film until a pre-determined number of insulation layers and magnetic layers are formed to form a composite film;

forming a first patterned mask layer on the composite film; and

etching the composite film until the surface of the substrate is exposed using the first patterned mask layer as an etching mask.

16. The method according to claim 15, wherein:

the first patterned mask layer has trenches parallel to the first conductive layers and exposing portions of the composite film; and

a plurality of discrete composite magnetic structures are formed after etching the composite film using the first patterned mask layer having the trenches as an etching mask.

17. The method according to claim 15, after etching the composite film to form the composite magnetic structure, further including:

forming a second patterned mask layer having trenches parallel to the first conductive layers on the composite magnetic structure; and

etching the composite magnetic structure until the surface of the substrate is exposed to form a plurality of discrete composite magnetic structures.

18. The method according to claim 15, after forming the composite film, further including:

forming a stop film on the composite film for subsequently forming a stop layer on the composite magnetic structure.

19. The method according to claim 14, before forming the plurality of the first conductive vias and the plurality of second conductive vias, further including:

forming a dielectric layer on the surface of the substrate and the surfaces of the first conductive layers.

20. The method according to claim 19, wherein forming the dielectric layer further includes:

forming a dielectric film on the substrate, the plurality of the first conductive layers, and the composite magnetic structure; and

planarizing the dielectric film until a top surface of the composite magnetic structure is exposed.