Storage Module and Method for Analysis and Disposition of Dynamically Tracked Read Error Events

• US 20160041891A1
• Filed: 08/07/2014
• Published: 02/11/2016
• Est. Priority Date: 08/07/2014
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Darragh, Neil Richard, Malshe, Ashutosh, Krishnamoorthy, Karthik
• Granted Patent: US 9,396,080 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: G06F 11/2094 Redundant storage or storage space G06F11/2056 takes precedence
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G11C 2029/4402 Internal storage of test result, quality data, chip identification, repair information
• CPC Class Codes: G11C 29/00 Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

A method for analyzing a read error event is provided comprising reading a page of data stored in memory, determining a read error event for the page of data, and identifying a scope of the read error event in the memory. In another embodiment, a method for performing a preliminary read error recovery is provided comprising reading a first data unit from memory and identifying a bit error rate for a first data unit with a correction engine, determining that the bit error rate is above a threshold, accessing a data structure including entries identifying data units and read error event information associated with the data units, identifying a second data unit in an entry that matches the first data unit, and performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.

Claims

1. A method for analyzing a read error event, the method comprising:

performing the following in a storage module having a memory partitioned into a plurality of blocks, wherein each block comprises a plurality of pages;

reading a page of data stored in the memory;

determining a read error event for the page of data; and

identifying a scope of the read error event in the memory.

2. The method of claim 1, wherein identifying the scope of the read error event comprises determining whether the scope is limited to the page or covers a block that includes the page.

3. The method of claim 2, wherein determining whether scope is limited to the page or covers the block:

determining bit error rates for other pages of the block;

determining a composite bit error rate for the block based on the bit error rates for the other pages; and

comparing a bit error rate for the page with the composite bit error rate for the block.

4. The method of claim 3, wherein determining whether the scope is limited to the page or covers the block comprises:

determining that the scope is limited to the page when the bit error rate for the page is greater than the composite bit error rate for the block; and

determining that the scope covers the block when the composite bit error rate for the block is greater than the bit error rate for the page.

5. The method of claim 2, wherein identifying the scope of the read error event further comprises:

when the scope covers the block, determining whether the scope is limited to the block or covers a plurality of blocks that receive gate bias voltages at the same threshold voltage levels.

6. The method of claim 5, wherein determining whether the scope is limited to the block or covers a plurality of blocks that receive gate bias voltages at the same threshold voltage levels comprises:

determining that the scope is limited to the block when a composite bit error rate for the block is greater than a composite bit error rate for the plurality of blocks; and

determining that the scope covers the plurality of blocks when the composite bit error rate for the block is less than the composite bit error rate for the plurality of blocks.

7. The method of claim 1, further comprising:

disposing of the read error event according to the scope.

8. The method of claim 7, wherein disposing of the read error event according to the scope comprises:

when the read error event is limited to the page, relocating the page in the memory without performing threshold voltage level calibration.

9. The method of claim 7, wherein disposing of the read error event according to the scope comprises:

when the read error event covers the block but does not expand beyond the block;

adjusting a threshold voltage level one or more times to obtain one or more bit error rates for the block;

when an adjusted threshold level yields one of the one or more bit error rates for the block to be below a threshold level, setting the threshold voltage level for subsequent reads of the block to the adjusted threshold voltage level; and

relocating the block in the memory when none of the one or more bit error rates is below the threshold level.

10. The method of claim 7, wherein disposing of the read error event according to the scope comprises:

when the read error event covers a plurality of blocks that receive gate bias voltages at the same threshold voltage levels;

adjusting a threshold voltage level to obtain one on or more bit error rates for the plurality of blocks;

when an adjusted threshold level yields one of the one or more bit error rates for the block to be below a threshold level, setting the threshold voltage level for subsequent reads of the plurality of blocks to the adjusted threshold level; and

relocating the plurality of blocks in the memory when none of the one or more bit error rates is below the threshold level.

11. The method of claim 1, further comprising:

maintaining a data structure of read error events, wherein the data structure includes an entry that identifies a read error event for a data unit of the page of data, and

wherein the read error event for the page of data is determined by accessing the entry in the data structure.

12. The method of claim 1, wherein identifying the scope of the read error event is a background process.

13. The method of claim 1, wherein the memory is a three-dimensional memory.

14. The method of claim 1, wherein the storage module is embedded in the host.

15. The method of claim 1, wherein the storage module is removably connected to the host.

16. A method for performing a preliminary read error recovery, the method comprising:

performing the following in a storage module having a memory and a correction engine;

reading a first data unit from the memory and identifying a bit error rate for the first data unit with the correction engine;

determining that the bit error rate is above a threshold;

accessing a data structure including entries identifying data units and read error event information associated with the data units;

identifying a second data unit in an entry that matches the first data unit; and

performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.

17. The method of claim 16, further comprising:

determining to perform a primary read error recovery process on the data in response to the bit error rate being above the threshold,

wherein the storage module accesses the data structure, identifies the second data unit in the entry, and performs the preliminary read error recovery process before performing the primary read error recovery.

18. The method of claim 17, wherein the storage module does not perform the primary read recovery process when the preliminary read recovery process reduces the bit error rate below the threshold.

19. The method of claim 16, wherein the first data unit matches the second data unit when addresses of the first and second data units match, the first data unit and the second data unit are located in the same block, or the first data unit and the second data unit are located in blocks that receive gate bias voltages at the same threshold levels.

20. The method of claim 16, wherein the read error event information associated with the data units identifies one or more of the following:

one or more adjusted threshold levels, a power mode of the correction engine, or a number of soft bits.