ELECTRICAL CHARGE BALANCING METHOD FOR FUNCTIONAL STIMULATION USING PRECISION PULSE WIDTH COMPENSATION

• US 20160045743A1
• Filed: 08/23/2015
• Published: 02/18/2016
• Est. Priority Date: 02/26/2013
• Status: Active Grant

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Liu, Wentai, Lo, Yi-Kai, Chen, Kuanfu, Hill, Richard
• Granted Patent: US 9,700,724 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: A61N 1/36046 of the eye
• CPC Class Codes: A61N 1/36125 Details of circuitry or electric components
• CPC Class Codes: A61N 1/36142 for improving safety
• CPC Class Codes: A61N 1/36146 specified by the stimulation parameters
• CPC Class Codes: A61N 1/3615 Intensity
• CPC Class Codes: A61N 1/36157 Current A61N1/3616 takes precedence

Abstract

An apparatus and method for electrical charge balancing when generating a stimulus during functional neural stimulation is presented. A stimulus pulse is generated (cathodic or anodic), and after a selected delay a charge compensating pulse is generated of an opposite polarity. The electrode circuit discontinuously examines electrode voltage after termination of the stimulus pulse, and utilizes this voltage to determine how long to extend the width of the charge compensating pulse. The electrode circuit thus performs accurate electrical charge cancellation to remove residual charges from the electrode by precisely controlling pulse width for an opposing polarity compensating pulse that need not have the same current level as the stimulus pulse.

Claims

1. An apparatus for electrical charge balancing when generating functional neural stimulation, comprising:

one or more stimulus electrodes;

a stimulation pulse generation circuit configured for driving current waveforms as a cathodic or anodic stimulus through said one or more stimulation electrodes;

a switching circuit configured for sampling electrode voltage from each said stimulus electrode when each stimulus terminates;

a feedback sensor coupled to said switching circuit for generating triggering signals in response to comparing electrode voltage sampled by said switching circuit with a reference; and

a digital control circuit configured for causing said stimulation pulse generation circuit to output either a cathodic or anodic stimulus pulse, then after a selected delay, causing said stimulation pulse generation circuit to generate an opposing polarity pulse having a pulse width that is adjusted by said digital control circuit toward achieving a zero net charge residual based on input from said trigger signals.

2. The apparatus recited in claim 1, wherein said one or more stimulus electrodes comprises an array of electrodes.

3. The apparatus recited in claim 1, wherein said switching circuit is configured for turning on and off a switch to discontinuously connect voltage from the stimulation electrode to said feedback sensor when each stimulus pulse terminates.

4. The apparatus recited in claim 1, wherein said feedback sensor comprises a multiple-bit analog-to-digital converter (ADC).

5. The apparatus recited in claim 1, wherein said feedback sensor comprises a comparator.

6. The apparatus recited in claim 1, wherein said feedback sensor generates to a trigger to said digital control circuit in response to comparing stimulation electrode voltage with a reference voltage.

7. The apparatus recited in claim 6, wherein if a positive residual voltage is larger than a positive reference voltage, then width of cathodic current in said opposing polarity pulse is increased, or alternatively width of anodic current in said opposing polarity pulse is decreased.

8. The apparatus recited in claim 6, wherein if a negative residual voltage is less than a negative reference voltage, then width of cathodic current in said opposing polarity pulse is increased, or alternatively width of anodic current in said opposing polarity pulse is decreased.

9. The apparatus recited in claim 1, wherein said digital control circuit is configured to control the width of the opposing polarity pulse in response to a count of periods from a digital clock circuit, toward providing precision pulse width compensation.

10. The apparatus recited in claim 1, wherein digital control circuit is configured to allow a selection of different stimulation waveforms.

11. The apparatus recited in claim 1, wherein said apparatus does not require matching opposing pulse amplitudes toward achieving charge-balanced electrical stimulation.

12. The apparatus recited in claim 1, wherein said apparatus does not insert extra pulses, beyond said opposing polarity pulse, to achieve zero net charge residual, as these extra pulses can cause false depolarization of neural membranes.

13. The apparatus recited in claim 1, wherein said stimulus electrodes do not incorporate a DC-blocking capacitor in series with each stimulator to reduce DC current.

14. The apparatus recited in claim 1, wherein said apparatus overcomes problems with leakage charge during inter-pulse delay periods that arise in response to Faradic charge transfer resistance of an electrode.

15. The apparatus recited in claim 1, wherein said stimulus and said opposing polarity pulse are not limited to having matched cathodic and anodic current.

16. The apparatus recited in claim 15, wherein said stimulus and said opposing polarity pulse differ to support generation of electrode stimulation patterns having unmatched cathodic and anodic current intensity.

17. The apparatus recited in claim 1, wherein said apparatus is integrated within a biomedical implantable functional or neural stimulation (FES/FNS) device.

18. The apparatus recited in claim 1, wherein said apparatus is integrated within a biomedical implant device selected from the group of implant devices consisting of cochlear implants, retinal prosthesis, cortical stimulators and deep brain stimulators.

19. A method for electrical charge balancing of functional neural stimulation, comprising:

generating a stimulus pulse;

examining electrode voltage discontinuously by turning on/off a switch for sampling electrode voltage when each stimulus pulse terminates;

comparing the electrode voltage being sampled against a reference voltage to trigger a digital control circuit; and

changing pulse width of an opposite polarity pulse, configured for charge compensation of said stimulus pulse, in response to comparing said sampled voltage with said reference voltage.

20. The method recited in claim 19, wherein comparing of the electrode voltage is performed utilizing a multiple-bit analog-to-digital converter (ADC) or a comparator.